JPS61147540A - Etching method of bonding pad of semiconductor element - Google Patents
Etching method of bonding pad of semiconductor elementInfo
- Publication number
- JPS61147540A JPS61147540A JP26841484A JP26841484A JPS61147540A JP S61147540 A JPS61147540 A JP S61147540A JP 26841484 A JP26841484 A JP 26841484A JP 26841484 A JP26841484 A JP 26841484A JP S61147540 A JPS61147540 A JP S61147540A
- Authority
- JP
- Japan
- Prior art keywords
- etching
- electrode
- bonding pad
- aluminum
- wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85009—Pre-treatment of the connector or the bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Weting (AREA)
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
この発明は半導体素子のボンディングパッドに対するエ
ツチング方法に関し、特にボンディングパッドに対する
ボンディング前の液相エツチング方法を改良するもので
ある。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an etching method for bonding pads of a semiconductor device, and particularly to an improved liquid phase etching method for bonding pads before bonding.
従来半導体素子のボンディングパッドの形成には、ボン
ディングパッドを含む配線パターン形成のためのアルミ
ニウム層を被着し、ついでこのPSG(リン珪酸ガラス
)層を被着しバターニングのための弗化アンモニウム系
エツチング液でエツチングを施すが、この際アルミニウ
ムも微少エツチングされる。Conventionally, in the formation of bonding pads for semiconductor devices, an aluminum layer is deposited to form a wiring pattern including the bonding pads, and then this PSG (phosphosilicate glass) layer is deposited and ammonium fluoride-based material is used for buttering. Etching is performed using an etching solution, and at this time, aluminum is also slightly etched.
上記液相エツチングは一般に第3図に示すようなエツチ
ング液[(1(■)に、半導体ウェーハキャリヤ(10
2)(以下ウェーハキャリヤと略称)に納められた複数
の半導体ウェーハ(103,103・・・)(以下ウェ
ーハと略称)をエツチングバス(104)のエツチング
液(105)中に浸漬し、ウェーハを回転させながらエ
ツチングを行なっていた。なお、このつ工−ハの回転は
ウェーハキャリヤの下部に対向して設けられたローラ(
106)を、ウェーハキャリヤの下部に周縁の一部を露
出させたウェーハに摺接させて行なわれていた。The above liquid phase etching is generally carried out using an etching solution [(1 (■)) as shown in FIG. 3, and a semiconductor wafer carrier (10
2) A plurality of semiconductor wafers (103, 103...) (hereinafter referred to as wafers) housed in a wafer carrier (hereinafter referred to as wafer carrier) are immersed in an etching solution (105) of an etching bath (104). Etching was performed while rotating it. Note that the rotation of this wafer carrier is controlled by rollers (
106) was slid into contact with a wafer whose peripheral edge was partially exposed at the bottom of a wafer carrier.
取上の方法によると、アルミニウム層上に例えば1.0
〜2.0μm厚に設けられたPSG層のエッチングはP
SG層を完全に除去することが必要であるため、アルミ
ニウム層が露出してもこの露出面に微かにエツチングが
施される。According to the pick-up method, for example, 1.0
The etching of the PSG layer provided with a thickness of ~2.0 μm is P
Since it is necessary to completely remove the SG layer, even if the aluminum layer is exposed, the exposed surface is slightly etched.
上記アルミニウム層のエツチングにより、理論的には美
麗なアルミニウムの地肌が見られる筈であるが、実際に
は第3図に示すように異質な膜とみられる着色部が生成
する。このような着色部を生ずると後の工程の例えばダ
イソータ工程で針がアルミニウム層に直接触れなくて接
触不良となることがある。By etching the aluminum layer, a beautiful aluminum background should theoretically be visible, but in reality, a colored portion that appears to be a foreign film is produced as shown in FIG. If such a colored portion occurs, the needle may not directly touch the aluminum layer in a later process, such as a die sorter process, resulting in poor contact.
ところで、取上の着色部が生ずるのは、オーバエツチン
グにより他のアルミニウム層のエツチングによって多量
に生じたアルミニウムイオンが液中に滞留し、これが集
まって生成することが考えられる。また、他の汚染物、
すなわち、ウェーハの汚れ、他のパターンやボンディン
グパッドなどの液中への流出体、レジストや有機容剤等
の有機物も関与していると見られ、これらは流水不足に
よって多発する傾向がある。Incidentally, it is thought that the reason why the colored portions are formed is that a large amount of aluminum ions generated by etching other aluminum layers due to overetching remain in the solution and are generated by gathering. Also, other contaminants,
That is, dirt on the wafer, objects spilled into the liquid from other patterns and bonding pads, and organic substances such as resist and organic agents are also considered to be involved, and these tend to occur frequently due to insufficient running water.
この発明は上記従来の問題点に鑑み半導体素子のボンデ
ィングパッドのエツチング方法を改良する。In view of the above-mentioned conventional problems, the present invention improves the etching method for bonding pads of semiconductor devices.
この発明にかかる半導体素子のボンディングパッドのエ
ツチング方法は、半導体素子ウェーハに形成された半導
体素子のアルミニウムのポンディ・ングパッドに対する
ボンディングに先立ちこのウェーハを、アルミニウムを
エツチングする液に浸漬するとともに、この液に微弱な
直流を通電してエツチングを施すことを特徴とし、ボン
ディングパッドの異質膜の形成を防止するものである。In the method for etching bonding pads of semiconductor devices according to the present invention, prior to bonding a semiconductor device formed on a semiconductor device wafer to an aluminum bonding pad, the wafer is immersed in a solution for etching aluminum, and the wafer is immersed in the solution. It is characterized by etching by passing a weak direct current to prevent the formation of a foreign film on the bonding pad.
以下、この発明の一実施例につき第1図を参照して説明
する。なお、一実施例に用いられるエツチング装置を示
す第1図において、従来の装置を飛す第3図と変らない
部分には従来と同じ符号を付して示し、説明を省略する
。An embodiment of the present invention will be described below with reference to FIG. In FIG. 1, which shows an etching apparatus used in one embodiment, parts that are the same as those in FIG. 3, which shows a conventional apparatus, are denoted by the same reference numerals as in the conventional apparatus, and a description thereof will be omitted.
第1図に示すエツチング装置(1)は、エツチングバス
(104)内のエツチング液(105)中に離隔して2
個の電極(2a、 2b)を挿入し、電極(2a)は白
金、電極(2b)はアルミニウムとし5図示のように、
電極(2a)が負、電極(2b)が正の微弱な直流電源
に接続し1通電させる。この通電によりエツチング液中
に生じた金属イオン(+帯電)および不純物イオンは白
金電極に吸引され中和される。The etching apparatus (1) shown in FIG.
Insert two electrodes (2a, 2b), with electrode (2a) made of platinum and electrode (2b) made of aluminum, as shown in Figure 5.
The electrode (2a) is connected to a weak DC power source with negative electrode (2b) and positive electrode (2b), and the current is applied once. Metal ions (+ charged) and impurity ions generated in the etching solution by this energization are attracted to the platinum electrode and neutralized.
取上の通電は一つの例示であるが、印加する電位を逆に
することが有効なことも経験した。また、電位を交互に
変化させて有効であった経験もある。The energization described above is just one example, but I have also experienced that reversing the applied potential is effective. There is also experience that alternating the potential was effective.
この発明によれば、アルミニウムのボンディングパッド
のエツチングにより表面に異質の膜が生成され、特殊部
分に呈色するという問題点が完全に解決できた。なお、
この発明は実施にあたり装置に大幅な改造を要せずに達
成できる利点もある。According to this invention, the problem that a foreign film is formed on the surface due to etching of an aluminum bonding pad, causing coloration in special parts can be completely solved. In addition,
This invention also has the advantage that it can be put into practice without requiring any major modifications to the apparatus.
第1図はこの発明の一実施例に用いられるエツチング装
置の断面図、第2図はウェーハキャリヤの斜視図、第3
図は従来のエツチング装置の断面図、第4図はボンディ
ングパッドの異状を示す写真に基づいて示す上面図、第
5図は第4図の一部を拡大して示す図である。
↓ エツチング装置FIG. 1 is a sectional view of an etching apparatus used in an embodiment of the present invention, FIG. 2 is a perspective view of a wafer carrier, and FIG.
The figure is a sectional view of a conventional etching apparatus, FIG. 4 is a top view based on a photograph showing an abnormality in a bonding pad, and FIG. 5 is an enlarged view of a part of FIG. 4. ↓ Etching device
Claims (1)
のボンディングパッドに対するボンディングに先立ちこ
のウェーハを、アルミニウムをエッチングする液に浸漬
するとともに、この液に微弱な直流を通電してエッチン
グを施すことを特徴とする半導体素子のボンディングパ
ッドのエッチング方法。A semiconductor characterized in that, prior to bonding a semiconductor element formed on a semiconductor wafer to an aluminum bonding pad, the wafer is immersed in a solution for etching aluminum, and the solution is etched by passing a weak direct current through the solution. Etching method for device bonding pads.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26841484A JPS61147540A (en) | 1984-12-21 | 1984-12-21 | Etching method of bonding pad of semiconductor element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26841484A JPS61147540A (en) | 1984-12-21 | 1984-12-21 | Etching method of bonding pad of semiconductor element |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61147540A true JPS61147540A (en) | 1986-07-05 |
Family
ID=17458146
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP26841484A Pending JPS61147540A (en) | 1984-12-21 | 1984-12-21 | Etching method of bonding pad of semiconductor element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61147540A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100727875B1 (en) | 2005-05-23 | 2007-06-14 | 삼성전자주식회사 | Oven range |
JP2014072298A (en) * | 2012-09-28 | 2014-04-21 | Shibaura Mechatronics Corp | Substrate processing apparatus and substrate processing method |
-
1984
- 1984-12-21 JP JP26841484A patent/JPS61147540A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100727875B1 (en) | 2005-05-23 | 2007-06-14 | 삼성전자주식회사 | Oven range |
JP2014072298A (en) * | 2012-09-28 | 2014-04-21 | Shibaura Mechatronics Corp | Substrate processing apparatus and substrate processing method |
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