JPH03107765U - - Google Patents
Info
- Publication number
- JPH03107765U JPH03107765U JP1631590U JP1631590U JPH03107765U JP H03107765 U JPH03107765 U JP H03107765U JP 1631590 U JP1631590 U JP 1631590U JP 1631590 U JP1631590 U JP 1631590U JP H03107765 U JPH03107765 U JP H03107765U
- Authority
- JP
- Japan
- Prior art keywords
- line
- straight line
- filling
- boundary
- drawn
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 1
Landscapes
- Image Generation (AREA)
Description
第1図は本考案に係る画像処理装置の一実施例
のブロツク図、第2図は第1図に示した描画処理
部の構成例を示す図、第3図a乃至hはクロツク
コントローラをイネーブルにしたときに第2図の
描画処理部で処理される各種信号、データのタイ
ミングを示すタイムチヤート、第4図は第1図の
画像処理装置の処理流れを示すフローチヤート、
第5図乃至第8図は第1図の画像処理装置におい
てなされる描画処理の過程を説明するための図で
ある。
1……シーケンサ、2……ROM、3……バス
インタフエース部、4……コマンドレジスタ、5
,9,17……セレクタ、6,7……レジスタ、
8……DDAエンジン、10,11,18,19
……メモリ、12……描画器、13……AND回
路、14……Dフリツプフロツプ、15……マル
チプレクサ、16……シリアル/パラレル変換器
、20……クロツクコントローラ、21……カウ
ンタ、22……レジスタ、30……画像処理装置
、31……フオントROM、32……描画処理部
。
FIG. 1 is a block diagram of an embodiment of an image processing device according to the present invention, FIG. 2 is a diagram showing an example of the configuration of the drawing processing section shown in FIG. 1, and FIGS. 3 a to 3 h show a clock controller. A time chart showing the timing of various signals and data processed by the drawing processing unit shown in FIG. 2 when enabled; FIG. 4 is a flow chart showing the processing flow of the image processing device shown in FIG. 1;
5 to 8 are diagrams for explaining the process of drawing processing performed in the image processing apparatus of FIG. 1. FIG. 1... Sequencer, 2... ROM, 3... Bus interface section, 4... Command register, 5
, 9, 17...selector, 6, 7... register,
8...DDA engine, 10, 11, 18, 19
...Memory, 12...Drawer, 13...AND circuit, 14...D flip-flop, 15...Multiplexer, 16...Serial/parallel converter, 20...Clock controller, 21...Counter, 22... ...Register, 30... Image processing device, 31... Font ROM, 32... Drawing processing section.
Claims (1)
界線で挟まれるように閉領域の境界線を直線描画
する直線描画手段と、該直線描画手段によつてな
された直線描画を各ラインごとに順番に走査し、
該ライン走査において奇数番目に交わつた境界線
から次に交わる境界線までの画素を塗りつぶす塗
りつぶし手段とを備えていることを特徴とする画
像処理装置。 2 各ラインごとの塗りつぶし部分が偶数本の境
界線で挟まれるように閉領域の境界線を直線描画
する直線描画手段と、該直線描画手段によつてな
された直線描画を各ラインごとに順番に走査し、
該ライン走査において奇数番目に交わつた境界線
から次に交わる境界線までの画素を塗りつぶす塗
りつぶし手段と、前記直線描画手段で直線描画す
る際に描画なされなかつた境界データを、前記塗
りつぶし手段で塗りつぶしのなされた描画に付加
する描画付加手段とを備えていることを特徴とす
る画像処理装置。[Claims for Utility Model Registration] 1. A straight line drawing means for drawing the boundary line of a closed area in a straight line so that the filled part of each line is sandwiched between an even number of border lines, and a straight line drawn by the straight line drawing means. Scan the drawing line by line in turn,
An image processing apparatus comprising: a filling means for filling in pixels from the odd-numbered boundary line that intersects to the next intersecting boundary line in the line scanning. 2. A straight line drawing means for drawing a boundary line of a closed area in a straight line so that the filled part of each line is sandwiched between an even number of border lines, and a straight line drawing made by the straight line drawing means for each line in order. scan,
a filling means for filling in pixels from an odd-numbered boundary line to the next intersecting boundary line in the line scanning; and a filling means for filling in boundary data that is not drawn when drawing a straight line by the straight line drawing means. An image processing apparatus comprising: a drawing addition means for adding a drawing to the drawn drawing.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1631590U JPH03107765U (en) | 1990-02-21 | 1990-02-21 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1631590U JPH03107765U (en) | 1990-02-21 | 1990-02-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03107765U true JPH03107765U (en) | 1991-11-06 |
Family
ID=31519584
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1631590U Pending JPH03107765U (en) | 1990-02-21 | 1990-02-21 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03107765U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008078865A (en) * | 2006-09-20 | 2008-04-03 | Bunka Shutter Co Ltd | Remote control device |
JP4548743B1 (en) * | 2010-03-01 | 2010-09-22 | 公二 宇野 | ruler |
-
1990
- 1990-02-21 JP JP1631590U patent/JPH03107765U/ja active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008078865A (en) * | 2006-09-20 | 2008-04-03 | Bunka Shutter Co Ltd | Remote control device |
JP4548743B1 (en) * | 2010-03-01 | 2010-09-22 | 公二 宇野 | ruler |
JP2011178003A (en) * | 2010-03-01 | 2011-09-15 | Koji Uno | Ruler |
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