JPS602670B2 - Display control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a display device using a microprocessor (hereinafter referred to as "MPU").
The purpose is to improve the processing capacity of the MPU.

A display device using an MPU generally has a configuration as shown in FIG.

In other words, 1 is an MPU, 2 is a ROM (Read Only Memory) that stores programs, and 3 is a work RAM (Random Access Memory) that stores data.
cessMemory). DMA (Direct
MemoryAccess) control 4 allows
A command is given directly to the screen memory 5 and the line buffer 6 for one line without going through the address bus 7 for MPU, and the data at the address specified by the address bus 7' for DMA is transferred to the data bus 8, and the line buffer for one line is sent. 6 to store one row of data. Based on the control of the display timing circuit 9, data from the line buffer 6 for one line is transferred to a character generator (CG) 10, and the character data is converted into a serial signal via a parallel-to-serial conversion circuit 11. Output as a video signal. In this case, the retrace time H when the raster scan returns from the end of one raster to the beginning of the next raster
R (HorizontaIRetrace) and retrace time VR (Vim
caIReVace) does not need to be displayed on the screen, so an OR circuit 12 performs an OR operation, and a gate circuit 13 performs blanking during both flyback times HR and VR. The PiA 14 is a register that stores data from an external device such as a keyboard or a host computer. In the above configuration, a shift register was conventionally used as the line buffer 6 for one row, but as RAM became cheaper, RAM came to be used. However, in general, when the number of characters in one line of a screen display is 80, there is no suitable RAM with a storage capacity matching that number. Therefore, recently, a system has been used in which the display data is input directly from the screen memory 5 via the data bus 8 to the CO1 without providing the line buffer 6 for one line. Therefore, since there is no storage part, data is always required during the screen display period, and therefore data is continuously retrieved from the screen memory 5 during the display period using DMA control. Therefore, it can be said that the data bus 8 is almost exclusively used for screen display. The screen display is performed by raster scanning and is displayed using the video signal output from the gate circuit 13.
This means that only the flyback time of R does not need to be displayed. On the other hand, the MPUI controls reading and writing of data from external devices such as a keyboard and a host computer stored in the PiA 14.

However, as mentioned above, the data bus 8 is almost monopolized for screen display, and the data bus 8 can only be used for MPUI processing during the HR and VR periods, making the M-UI more efficient. becomes very bad. If the processing requires only input from the keyboard, the speed of using only the HR and VR periods will be sufficient, but if there is a write from the host computer or control of various screens is required, the processing speed of MPUI will be considerably slower. The above period alone is insufficient. Therefore M
If the data bus 8 is used preferentially for PUI processing, there is a risk that display data will be dropped and the display quality will deteriorate. Furthermore, there is a method of dividing one MPUI cycle into an MPU cycle and a DMA cycle, but this requires complex circuitry for data bus switching, memory configuration, etc. After all, if the data bus 8 is to be used in common,
This means that the only period during which the MPUI can be used is the flyback period. The present invention has been made in view of these drawbacks, and in order to achieve this purpose, not only the flyback period but also the blank period after the last displayed character in each line of the screen display is changed to one part of the flyback period. In addition M
A method is adopted in which this time is used as PUI processing time.

Next, embodiments of the present invention will be described.

Figure 2 shows an example of the screen display, with 80 characters horizontally and
This device is capable of displaying a total of 1,920 characters, with two characters displayed vertically. Now, assuming that one line is displayed with 16 rasters, the HR period corresponds to 20 characters, and the VR period corresponds to 2 lines,
Since the processing time of MPUI according to the conventional method is only for the HR and VR periods as mentioned above, the efficiency of MPUI is the ratio of the HR and VR times to the full screen display time, and from the following equation, This is approximately 26%. However, in general, information is displayed from the left side to the right side of the screen, and is rarely displayed all the way to the right edge, and this remaining blank area represents space.

The present invention attempts to improve processing efficiency by utilizing this space time in addition to the conventional MPU II processing time.

That is, in Fig. 2, a special code 15 that is not displayed on the screen is inserted after the last data of each line, and by detecting this code 15, it is determined that there is no subsequent data in that line. Judging that, then. From the white stage to the end of the line, the hardware forcibly applies planking to the video signal. According to the example in Figure 2, the number of characters to be blanked in each line is 1, 2...2, as shown in the vertical column at the right end of the figure.
4; are 30, 7 & 78 characters, respectively. Therefore, the efficiency of MPUI according to the present invention is determined by the molecule of the above formula, H
It is determined by adding the time determined by subtracting the number of special codes 15 from the total number of characters subject to blanking to the R and VR times, and is approximately 75% as shown in the following formula. As a result, in the display example of FIG. 2, the improvement rate of MPU efficiency is 0.75/0.26≠2.
It becomes 9.

FIG. 3 is a block diagram showing an example of a display control circuit implementing the method of the present invention. The basic configuration is the same as the conventional example shown in FIG. 1, but a row end decoding circuit 16 is newly provided. When the row end decoding circuit 16 detects the row end special code I5, it sets the flip-flop circuit 17 and outputs a signal from the OR circuit 18 to give a command to the M circle UI. Then, data bus 8 is
In addition to being used for PUI processing, a signal is also given to the gate circuit 13 that controls the video signal, thereby prohibiting output of the video signal. As in the conventional case, the gate circuit 13 is controlled by the HR and VR signals via the OR circuit 18, but the HR signal also resets the flip-flop circuit 17 in preparation for detection of the special code 15 of the next raster. As described above, according to the present invention, by simply adding a simple circuit to the conventional display control circuit, the MPU host computer or keyboard, etc. It becomes possible to perform processing with the device even within the conventional display time.

Therefore, writing to the screen memory or transferring from the memory to the host computer can be performed remotely and in large quantities, and there are no problems such as display omissions, and the processing efficiency of the MPU can be increased. becomes.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing a conventional example of a display device using a microprocessor, Fig. 2 is a line of screen displays according to the method of the present invention, and Fig. 3 is a block diagram showing an embodiment of a display control circuit according to the present invention. It is. In the figure, 1 is an MPU, 5 is a screen memory, 7 is an address bus, 8 is a data bus, 10 is a character generator, 15 is a special code, and 16 is a row end decoding circuit. Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] 1 The scanning period is the DMA control period, and the retrace period is the MPU control period.
A control period is defined as a DMA control period, and a display device that reads and displays character information from a screen memory stores a specific code after the last character information in each line of the screen memory, and when this specific code is detected during the DMA control period. , a display control method characterized by switching from DMA control to MPU control.