JPS61190624A - Hard-copy system of graphic display picture - Google Patents

Abstract

PURPOSE:To improve the output speed by dividing the recording area of a graphic memory into plural areas and accessing only areas, where graphic patterns to be displayed exist, on a basis of results detected by a detecting means. CONSTITUTION:A graphic display device consists of a graphic memory 1, a parallel/serial converter 2, an OR gate 4 which inputs a luminance modulated signal to a display device 3, a timing signal generating circuit 5 which generates a display address signal, and a processor 6 as a control means. In this case, the storage area of the memory into n-number of memory areas by, units of for example, m-number of scanning lines, and a detecting circuit 7 which detects whether a graphic pattern exists in each area or not is provided. When a hard copy of said pattern is obtained, the processor 6 takes in individual bit information of a latch 74 in the detecting circuit 7 and accesses storage areas of the memory corresponding to set bits and outputs patterns in only areas, where data exist, as a copy.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a hard copy system for a graphic display screen in a graphic display device.

[Prior Art] As is well known, in a CRT display device, when displaying a graphic pattern on a display screen, the graphic to be displayed is stored in a graphic memory having addresses corresponding to each position of a large number of display pixels on the display screen. Once the pattern has been written, the graphic pattern written in the graphic memory is read out using an address signal specifying the position of the display pixel, converted to a video signal in units of one display pixel, and input as a brightness modulation signal of the display section. It is composed of

By the way, in many graphic display devices of this type, a character display system for displaying a predetermined character pattern on the same display section is installed in parallel in addition to a graphic pattern display system. This character display system writes the character code of the character to be displayed into a refresh memory that has addresses that correspond one-to-one to a large number of character display positions on the display screen, and corresponds to each display position using an address signal. Read the character code, roughly input this character code to a character generator to generate font data corresponding to the character code, convert this font data into a video signal in units of one pixel, and then generate a graphic pattern video signal. The configuration is such that the logical sum is calculated and input to the display unit.

Now, among graphic display devices in which a graphic pattern display system and a character pattern display system are arranged side by side in this way, there is one that is configured to roughly output the contents of the display screen as a hard copy.

In a graphic display device equipped with this hard copy function, when outputting the contents of the display screen as a hard copy, the refresh memory is used in the same way as when displaying character patterns and graphic patterns.
It accesses the character generator and graphic memory, reads out font data and graphic patterns corresponding to the displayed content, performs conversion operations to match the data input standards of a recording device such as a printer, and then inputs them to the recording device. ing.

[Problems to be Solved by the Invention] However, in the conventional graphic display device described above, when outputting a hard copy of the display screen, even if the display content on the display screen is only a character pattern, the refresh memory and character pattern are Accessing generator and graphics memory.

For this reason, there is a problem in that the processing time when outputting a hard copy becomes long, and throughput cannot be expected to be improved. In particular, since the graphics memory has a very large storage capacity, it has a very large effect on throughput.

The present invention has been made in view of the above circumstances, and its object is to provide a graphic display device that can increase the hard copy output speed.

"Means for Solving the Problems" The present invention divides the recording area of a graphic memory into a plurality of areas, and provides detection means for detecting whether or not a graphic pattern to be displayed exists in each area. When outputting a hard copy, only the storage area where the graphic pattern to be displayed exists is accessed based on the detection result of the detection means.

[Operation] Access to the graphic memory is performed only to the recording area where the display graphic pattern exists, and the graphic pattern read out as a result of this access is input to the recording means.

[Embodiment] FIG. 1 is a block diagram showing an embodiment of the present invention, in which a graphic memory 1. A parallel/serial converter 2 that converts the graphic pattern read from the graphic memory 1 into a graphic video signal GSIR in units of one pixel and outputs it serially;
and a character video signal C3lR input from a character display system (not shown), and an OR gate 4 which forms a logical sum signal of the character video signal C3lR input from a character display system (not shown) and inputs it to the display device 3 as a luminance modulation signal, a horizontal synchronizing signal H3YNC synchronized with the rask scan of the display device 3, and a vertical synchronizing signal H3YNC. A timing signal generation circuit 5 generates a synchronization signal @VSYNC and a display address signal DADR for sequentially specifying display pixel positions, and a read address signal 8ADR when a new graphic pattern write address signal or hard copy is output.

A processing device 6 is provided as a control means for outputting graphic pattern data GD and transmitting and receiving graphic pattern data GD to and from the graphic memory 1. Roughly speaking, when the recording area of the graphic memory 1 is divided into n memory areas 1 or Y1 to Yn in units of m scanning lines as shown in FIG. A detection circuit 7 is provided for detecting whether or not .

Among these, the detection circuit 7 counts the horizontal synchronizing signal H3YNC, and the 1/m frequency divider 70 outputs the block boundary signal m every time the count reaches m, and the Count (direct memory area it!, Y
An n-ary counter 71 outputs a signal indicating the number n from 1 to Yn, and a memory area Y that decodes and codes the value of the signal n.
a decoder 72 that outputs signals SV1 to yn indicating each region of 1 to Yn; an AND circuit 73 that calculates the logical product of the signals y1 to yn and the graphic video signal GSIR; A latch 7 having the number of bits corresponding to the 0 entry, each corresponding bit being set by the AND signal of the AND gates G1 to Gn.
It is composed of 4. 8 is a display address signal ADR which is an address signal input to the graphic memory 1.
This multiplexer selects and outputs the display address signal DADR when displaying a graphic pattern, and selects and outputs the address signal ADRO when outputting a hard copy or writing a new graphic pattern.

In the above configuration, the data GD of the graphic pattern to be displayed on the display device 3 is obtained by switching the multiplexer 8 to the address signal ADRO side.
is input into the graphic memory 1, and data GD is supplied from the processing device 6 to the graphic memory 1, thereby writing the data. Thereafter, by switching the multiplexer 8 to the display address signal DADR side and inputting the display address signal DADR to the graphic memory 1, the graphic pattern data GD stored in the graphic memory 1 is synchronized with the rask scan of the display device 3. The signal is read out by the parallel/serial converter 2, converted into a graphic video signal GSIR for one pixel, and inputted to the display device 3 via the OR gate 4. As a result, a graphic pattern corresponding to the contents stored in the graphic memory 1 is displayed on the display screen of the display device 3.

On the other hand, when outputting a hard copy of the graphic pattern, the processing device 6 resets the storage contents of the latch 74, and then accesses the graphic memory 1 using the display address signal DADR to display a graphic pattern based on the data GD stored in the graphic memory 1. The pattern is displayed on the display device 3.

If at least one pixel of graphic data GD is stored in each of the storage areas Y1 to yn of the graphic memory 1 due to the display operation at this time, the signal GSIR obtained by converting this graphic data GD into a video signal and the
tj, Y1 to Yn are ANDed with the 7 signals y1 to yn. For this reason, each gate G1~(
A match signal If 1 IT is output from 3n, and each bit of the latch 74 is set. However, storage area Y1
If, for example, only Yl of ~Yn stores data GD, the AND of gates G2~Gn will not hold.
In latch 74, only the bits corresponding to G1 to G1 are set, and the remaining bits are not set. That is, in the latch 74, information indicating a storage area where the graphic data GD exists is stored even for one pixel.

Therefore, the processing bag @6 takes in the information of each bit of this latch 74 and transfers the storage area of the graphic memory 1 corresponding to the set bit to the address signal ADRo.
After accessing and reading the memory contents GD,
A predetermined conversion operation is performed to conform to the data input standard of the recording means (not shown), and the data is input to the recording means.

As a result, the graphic pattern only in the area where the graphic data GD exists is output as a hard copy.

Although the storage area of the graphic memory 1 is divided in the vertical scanning direction, it may be divided in the horizontal scanning direction or in a combination of the horizontal scanning direction and the vertical scanning direction. It is also possible to add a completely similar configuration to the character display system so that only the area where character pattern data exists is accessed for hard copy.

[Effects of the Invention] As is clear from the above description, according to the present invention, since only a predetermined range in which graphic pattern data is stored is accessed, unnecessary access to the graphic memory when outputting a hard copy is eliminated. In addition to improving the output speed of hard copies, the load on the processing device, which is the control means, is reduced, allowing for more data processing to be performed, and the overall functionality can be further enhanced. There are effects such as being able to.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing an example of a method for dividing a graphic memory area. DESCRIPTION OF SYMBOLS 1... Graphic memory, 2... Parallel/serial converter, 3... Display device, 4... OR gate, 5...
Timing signal generation circuit, 6... processing device, 7...
detection circuit.

Claims (1)

[Scope of Claims] A display means for displaying a graphic pattern, a graphic memory having a storage area corresponding to the display screen area of the display means and storing a graphic pattern to be displayed, and a graphic stored in the graphic memory. A graphic display device comprising a control means for reading a pattern and displaying it on the display means, and a recording means for inputting the graphic pattern read from the graphic memory and outputting a hard copy thereof, comprising: a storage area of the graphic memory; It is divided into a plurality of areas, and a detection means is provided for detecting whether or not a graphic pattern to be displayed exists in each area, and when outputting a hard copy of the graphic pattern, the control means should display the display based on the detection result of the detection means. A hard copy method for a graphic display screen, characterized in that only a storage area where a graphic pattern exists is accessed, and the graphic pattern read from the storage area is input into the recording means.