JPH03104739U - - Google Patents
Info
- Publication number
- JPH03104739U JPH03104739U JP1990012867U JP1286790U JPH03104739U JP H03104739 U JPH03104739 U JP H03104739U JP 1990012867 U JP1990012867 U JP 1990012867U JP 1286790 U JP1286790 U JP 1286790U JP H03104739 U JPH03104739 U JP H03104739U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- circuit board
- flexible circuit
- mounting structure
- annular substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990012867U JPH03104739U (enExample) | 1990-02-13 | 1990-02-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990012867U JPH03104739U (enExample) | 1990-02-13 | 1990-02-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03104739U true JPH03104739U (enExample) | 1991-10-30 |
Family
ID=31516314
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990012867U Pending JPH03104739U (enExample) | 1990-02-13 | 1990-02-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03104739U (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006028155A1 (ja) * | 2004-09-08 | 2006-03-16 | Nec Corporation | モジュール型電子部品及び電子機器 |
| JP2007081108A (ja) * | 2005-09-14 | 2007-03-29 | Yaskawa Electric Corp | 半導体チップの積層構造とそれを用いた半導体装置 |
-
1990
- 1990-02-13 JP JP1990012867U patent/JPH03104739U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006028155A1 (ja) * | 2004-09-08 | 2006-03-16 | Nec Corporation | モジュール型電子部品及び電子機器 |
| JP2007081108A (ja) * | 2005-09-14 | 2007-03-29 | Yaskawa Electric Corp | 半導体チップの積層構造とそれを用いた半導体装置 |