JPH0298146A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form a sufficiently thick metal electrode in a recess by forming a recess on a semiconductor active layer, then filling the recess with resist except a part directly under the window of a spacer, and electrolytically plating it. CONSTITUTION:After a spacer 5 is formed on a semiconductor active layer 2, the window of a photoresist 3 is formed, and with the resist 3 as a mask a window having the same size as that of the resist 3 is formed at the spacer 5. Thereafter, a recess is formed on the layer 2, and the resist 3 is removed. Further, the whole surface is covered with positive type photoresists 6, 61, and patterned as desired. In this case, the resist 6 remains on the sidewall of the recess. Thereafter, with the layer 2 as a negative electrode an electrolytic plating is conducted. After the plating is formed in a desired thickness, the spacer 5, the resists 6, 61 are removed. According to the method, since a plating electrode 7 having a T-sectional shape can be easily formed in the recess, a gate resistance can be remarkably reduced.

Description

[Detailed Description of the Invention] [Industrial Field of Application j This invention relates to a method of manufacturing a semiconductor device, particularly a recessed portion (1
1 below, relates to a method of forming an electrode within a recess (referred to as a recess).

[Prior Art j] Fig. 3 is a sectional view showing a manufacturing flow in the case of forming an electrode in a conventional recess by a lift-off method. In the figure, on a wafer having a semiconductor active layer (2) on a semi-insulating substrate α), a photoresist (3) is patterned by photolithography so that a window is formed where a rear layer is to be formed. Thereafter, a recess is formed using the photoresist (3) as a mask so that a desired recess shape is obtained (FIG. 3(a)). Thereafter, the desired metal is formed by vapor deposition to form the electrode (4) (Fig. 3(b)), and then a photoresist (
By removing 3) with an organic solvent or the like, a metal electrode (4) is formed only within the recess (FIG. 3(C)). The flow shown in FIGS. 3(b) to 3(c) is called the lift-off method. (4
1) is a photoresist (
3) is the vapor deposited metal that adheres to the surface.

Next, the operation will be explained.

In the conventional method, during the vapor deposition shown in Fig. 3(b) K, it is necessary to control the vapor deposition so that the vapor-deposited metal (41) on the top surface of the photoresist (3) and the metal electrode (4) in the recess do not come into contact at part A. . When in contact, the vapor deposited metal (41) and the gold g electrode (4
) cannot be cut, resulting in extremely poor lift-off performance. Furthermore, during vapor deposition, the vapor-deposited metal (41) is also vapor-deposited on the side walls of the photoresist (3), and the window width of the photo-resist (3) narrows as the vapor-deposited metal (41) grows, and the vapor deposition beam is not necessarily vertical. As a result, the side shape of the cross section of the metal electrode (4) is not vertical, but forms an angle of θ<90°, as shown in FIG. 3(c). Photoresist (3) If the window opening is narrow, if θ〈9o0, the metal t 4M
(4) The cross section becomes a tapered trapezoid, and it is no longer possible to form metal thicker than that.

“Problem to be Solved by the Invention 1 The conventional manufacturing method, which was performed as described above, cannot form a thick metal electrode in the recess and cannot reduce the wiring resistance of the metal electrode. There was a problem.

The present invention was made to solve the above problems, and an object of the present invention is to provide a method for forming a thick metal electrode on the upper needle within a recess.

[Means for Solving the Problems j] The method for manufacturing a semiconductor device according to the present invention includes forming a recess on a semiconductor active layer using a spacer as a mask, filling the inside of the recess except directly under the window of the spacer with resist, and then filling the recess with a resist. , electrolytic plating is performed using the semiconductor active layer as an electrode, resulting in a thick film within the recess! It forms the pole.

[Function] According to the present invention, a thick electrode can be formed within the recess, so that the wiring resistance of the electrode within the recess can be reduced.

[Example 1 An embodiment of the present invention will be described below with reference to FIG.

FIG. 1 is a cross-sectional view showing a manufacturing flow in which an electrode is formed in a recess, and FIG. 2 is a cross-sectional view showing a manufacturing flow in another embodiment in which an electrode is formed in a recess. In the figure, (1) to (3) are the same as those shown in the conventional example of FIG. 3, so their explanation will be omitted. S on the semiconductor active layer (2)
After forming a dielectric film (hereinafter referred to as a spacer) (5) such as i02 or SiN, a window of photoresist (3) is formed by photolithography, and reactive ion etching is performed using the photoresist (3) as a mask. The spacer (5) is anisotropically etched by (RIE) or the like to form a window with the same dimensions as the photoresist (3) in the spacer (5). After that, a recess of the desired shape is formed (Fig. 1(a)).
) L, then remove the photoresist (3) (first
Figure (b)). Furthermore, positive photoresists (6), (61
) is applied to the entire surface, and during the next plating, a positive photoresist (61) is used to prevent adjacent IT electrodes from coming into contact with each other due to the lateral growth of the plating. At this time, the area where the spacer (5) in the recess overhangs will be underexposed, so the positive photoresist (6) will remain on the side wall of the recess (Figure 1 (C)).
. Thereafter, electrolytic plating is performed using the semiconductor active layer (2) as a negative electrode (FIG. 1(d)). After forming the plating to the desired thickness, the spacer (5) is removed by wet etching (Fig. 1(e)), and then the positive photoresist (6) is removed.
), (61) are removed (FIG. 1(f)).

Next, the operation will be explained.

According to this invention, when forming the plating electrode (7) in the recess, there is no restriction on film thickness as in the lift-off method, and
For example, when this method is applied to the gate of a GaAsFET with a recessed structure, and the gate length is 0.3 μm and the recess depth is 0.2 μm, the film thickness will be The manufacturing limit was about 0.3 to 0.5 μm, and the cross-sectional shape was a trapezoid with a tapered top, close to a triangle. Therefore, the gel resistance increases as the gate length decreases, so L'E due to the decrease in gate length (Lg)
The increase in gate resistance impeded the improvement in T performance, and as a result, the FET performance could not be improved to the extent expected due to the Lg shortening effect. However, according to this invention, the thickness of the electrode can be easily increased to 1μ or more, and the cross-sectional shape is T-shaped due to the nature of the plating, so the gate resistance can be significantly reduced.
Can be reduced. Also, as shown in Figure 1(c), there is a positive photoresist (6) directly below the spacer (5) in the recess.
remains, so the plated t-pole (7) does not stick to the recess side walls, etc., and can be formed in the same area as the lift-off method. Therefore, since the gate length can be made the same, only the wiring resistance (Rg) can be reduced without changing other characteristics. Further, during this plating, if the thickness of the plating film exceeds the height of the spacer (5), the plating will grow in the lateral direction at almost the same speed as in the upward direction. As a result, the plated t-pole (7) has a T-shaped cross section. At this time, positive photoresist (61)
is not necessarily required, but a positive photoresist (6
1) has the effect of preventing contact with adjacent electrodes due to lateral growth of plating.

In the above embodiment, the wL pole is formed by plating directly on the semiconductor. For example, when this method is applied to the gate [pole] of GaAs Ii' IET, the plating electrode (7) and the semiconductor greatly influence the performance of Li'ET.

Since a Schottky junction is formed, it is important to change the bond formed by vapor deposition to a plating bond.
FIG. 2 shows an embodiment that provides a solution for this case, which is not necessarily preferable since it may change the performance and reliability of the T. FIG. 2 shows a conventional Schottky electrode (42) formed by the spacer lift-off method (FIG. 2(a) to ω)), and then a Schottky electrode (42)
) to form a plating t-pole (7) (Fig. 2(c)~<
r>>. At this time, the thickness of the Schottky electrode (42) is preferably equal to or less than the depth of the recess. According to the method shown in FIG. 2, only the gate resistance can be reduced without changing the Schottky characteristics.

[Advantageous Effects of the Invention 1] As described above, according to the present invention, a thick film electrode having a T-shaped cross section can be easily formed in a recess. Furthermore, there is an effect that the above can be achieved without changing the properties of the conventional semiconductor-metal junction.

[Brief explanation of drawings]

FIGS. 1(a) to (f) are cross-sectional views showing the manufacturing flow when electrodes are formed in recesses in an embodiment of the semiconductor device manufacturing method according to the present invention; f) is a sectional view showing the manufacturing flow of another embodiment of the present invention, FIG. 3G
) to (c) are cross-sectional views showing a conventional manufacturing flow. In the figure, (1) is a semi-insulating substrate, (2) is a semiconductor active layer, (3) is a photoresist, (5) is a spacer, (
6). (61) is a positive photoresist, (7) is a fitted 1 pole, and (42) is an H Schottky electrode. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Figure 1(a)

Claims (2)

[Claims] (1) Form a dielectric spacer on the semiconductor active layer, pattern it using a photoresist as a mask, and then form a recessed portion of a desired shape in a part of the semiconductor active layer using the spacer as a mask. After this step, a positive photoresist is applied, and the desired patterning is performed by photolithography, and at this time, the positive photoresist is left directly under the spacer in the recess, and the photoresist and spacer are used as a mask. 1. A method for manufacturing a semiconductor device, comprising the steps of: forming an electrode in the recess by electroplating the semiconductor active layer as an electrode; and finally removing unnecessary spacers and photoresist. (2) After forming the desired electrode in the recess with a film thickness thinner than the depth of the recess by the spacer soft-off method, the electrode is formed inside the thin recess formed using the same method as in (1) above. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the plated electrode is formed only on the electrode.