JPH0294661A - Capacity element of integrated circuit - Google Patents
Capacity element of integrated circuitInfo
- Publication number
- JPH0294661A JPH0294661A JP24801288A JP24801288A JPH0294661A JP H0294661 A JPH0294661 A JP H0294661A JP 24801288 A JP24801288 A JP 24801288A JP 24801288 A JP24801288 A JP 24801288A JP H0294661 A JPH0294661 A JP H0294661A
- Authority
- JP
- Japan
- Prior art keywords
- silicon oxide
- protruding
- oxide film
- silicon nitride
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 239000004065 semiconductor Substances 0.000 claims abstract description 5
- 229910052751 metal Inorganic materials 0.000 claims abstract description 4
- 239000002184 metal Substances 0.000 claims abstract description 4
- 239000012212 insulator Substances 0.000 claims abstract description 3
- 239000003989 dielectric material Substances 0.000 claims description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 15
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 15
- 229910052581 Si3N4 Inorganic materials 0.000 abstract description 9
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract description 9
- 229910052782 aluminium Inorganic materials 0.000 abstract description 7
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 4
- 229910052710 silicon Inorganic materials 0.000 abstract description 4
- 239000010703 silicon Substances 0.000 abstract description 4
- 239000000126 substance Substances 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 10
- 239000003990 capacitor Substances 0.000 description 4
- 238000005530 etching Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体基板上に形成された、モノリシック集
積回路の容量素子に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a capacitive element of a monolithic integrated circuit formed on a semiconductor substrate.
従来、半導体基板上に作成する容量素子としては、−船
釣には単層のMOSキャパシタ、また、ε、(比誘電率
)の大きな絶縁物を誘電体とする平面構造の容量素子が
ある。又、シリコントレンチ技術を用いて基板上に溝を
掘り、その表面上に導体−絶縁体−導体構造層を設ける
構造が、基板単位面積あたりの容量を大きくした容量素
子として最近報告されている。Conventionally, as a capacitor element formed on a semiconductor substrate, there are a single-layer MOS capacitor for boat fishing, and a planar structure capacitor element whose dielectric is an insulator having a large ε (relative permittivity). In addition, a structure in which a trench is dug on a substrate using silicon trench technology and a conductor-insulator-conductor structure layer is provided on the surface of the trench has recently been reported as a capacitive element with increased capacitance per unit area of the substrate.
上述した容量素子構造において、単層の容量素子では平
面利用効率が良くない。又大きいε、の誘電体を用いた
容量素子でも、ε、のバラツキが大きく安定性に欠ける
。また、溝堀り式の容量素子においては、その溝を垂直
に堀る必要があるが、その際の深さにも限界があり、平
面利用効率には限界があるという欠点を持つ。In the above-described capacitive element structure, a single-layer capacitive element does not have good planar utilization efficiency. Furthermore, even in a capacitive element using a dielectric material with a large ε, the variation in ε is large and stability is lacking. Further, in a trench-drilling type capacitor element, it is necessary to trench the trench vertically, but there is a limit to the depth at that time, and there is a drawback that there is a limit to the planar utilization efficiency.
上記課題に対し本発明では、半導体基板上に、側面に階
層状の凸凹面とされた絶縁物の凸起体を設け、この凸起
体表面に、間に誘電物質をはさんで金属層を形成し、こ
の金属層を対向電極とした容量素子としている。In order to solve the above problem, the present invention provides a semiconductor substrate with an insulating convex body with a layered uneven surface on its side surface, and a metal layer is formed on the surface of the convex body with a dielectric material in between. A capacitive element is formed with this metal layer as a counter electrode.
つぎに本発明を実施例により説明する。 Next, the present invention will be explained by examples.
第1図は本発明の一実施例の部分断面図である。FIG. 1 is a partial cross-sectional view of one embodiment of the present invention.
第1図において、シリコン基板1上を表面絶縁のシリコ
ン酸化膜2で被い、さらにその上に、例へば厚さ800
0人のシリコン窒化膜3とシリコン酸化膜4を交互に四
重に重ねて積層体を形成し、つぎに、所要部分をマスキ
ングして、シリコン酸化膜2上の積層体をエツチングで
除去し、シリコン窒化膜3とシリコン酸化膜4の四重積
層構造を有する凸起体を形成する。つぎにこの凸起体の
シリコン窒化膜3に対し選択的な側面エツチングを行う
ことにより、シリコン窒化膜3の部分は、側面から内側
に削り取られ、凸起体の側面は階層状の凸凹面となり、
側面エツチング前に比べ大幅な表面積の増加が得られる
。つぎに、この側面凸凹面となった凸起体素面に例えば
、1000人厚みのアルミ層5、同じ<1000人の誘
電体層シリコン酸化膜6、および同じ<1000人厚み
のアルミ層7を形成し、アルミ層5と7とを対向電極と
した容量素子となっている。In FIG. 1, a silicon substrate 1 is covered with a surface insulating silicon oxide film 2, and a silicon oxide film 2 with a thickness of 800 mm, for example, is coated on top of the silicon oxide film 2.
0 silicon nitride films 3 and silicon oxide films 4 are alternately stacked in four layers to form a laminate, and then the required portions are masked and the laminate on the silicon oxide film 2 is removed by etching. A convex body having a quadruple laminated structure of silicon nitride film 3 and silicon oxide film 4 is formed. Next, by performing selective side etching on the silicon nitride film 3 of the convex body, the silicon nitride film 3 portion is scraped inward from the side surface, and the side surface of the convex body becomes a layered uneven surface. ,
A significant increase in surface area can be obtained compared to before side etching. Next, for example, an aluminum layer 5 with a thickness of 1000 mm, a dielectric layer silicon oxide film 6 with a thickness of <1000 mm, and an aluminum layer 7 with a thickness of <1000 mm are formed on the bare surface of the convex body with uneven side surfaces. However, it is a capacitive element with aluminum layers 5 and 7 as opposing electrodes.
〔発明の効果〕
以上述べたように、本発明による容量素子は、モノリシ
ック集積回路基板上における容量素子の占有面積を従来
よりも少なくとも1/2〜1/3程度まで小さくするこ
とを可能とする効果がある。[Effects of the Invention] As described above, the capacitive element according to the present invention makes it possible to reduce the area occupied by the capacitive element on a monolithic integrated circuit board to at least 1/2 to 1/3 compared to the conventional one. effective.
第1図は本発明の一実施例の部分断面図である。
1・・・・・・シリコン基板、2・・・・・・基板上面
のシリコン酸化膜、3・・・・・・積層体のシリコン窒
化膜、4・・・・・・積層体のシリコン酸化膜、5,7
・・・・・・電極用アルミ層、6・・・・・・誘電体層
シリコン酸化膜。
代理人 弁理士 内 原 晋FIG. 1 is a partial cross-sectional view of one embodiment of the present invention. 1...Silicon substrate, 2...Silicon oxide film on the upper surface of the substrate, 3...Silicon nitride film of the stack, 4...Silicon oxide of the stack membrane, 5,7
...Aluminum layer for electrode, 6...Dielectric layer silicon oxide film. Agent Patent Attorney Susumu Uchihara
Claims (1)
起体が半導体基板上に形成され、さらに、前記凸起体の
表面に、容量素子の対向電極となる金属層が誘電体物質
を間にはさんで形成されてなることを特徴とするモノリ
シック集積回路の容量素子。A convex body made of an insulator with a layered uneven surface is formed on a semiconductor substrate, and a metal layer that becomes a counter electrode of a capacitive element is coated with a dielectric material on the surface of the convex body. A capacitive element of a monolithic integrated circuit characterized in that it is formed by sandwiching the element between the elements.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24801288A JPH0294661A (en) | 1988-09-30 | 1988-09-30 | Capacity element of integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24801288A JPH0294661A (en) | 1988-09-30 | 1988-09-30 | Capacity element of integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0294661A true JPH0294661A (en) | 1990-04-05 |
Family
ID=17171881
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP24801288A Pending JPH0294661A (en) | 1988-09-30 | 1988-09-30 | Capacity element of integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0294661A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100274354B1 (en) * | 1997-12-31 | 2000-12-15 | 김영환 | Structure of dielectric layer in a semiconductor device |
-
1988
- 1988-09-30 JP JP24801288A patent/JPH0294661A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100274354B1 (en) * | 1997-12-31 | 2000-12-15 | 김영환 | Structure of dielectric layer in a semiconductor device |
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