JPH0292560U - - Google Patents
Info
- Publication number
- JPH0292560U JPH0292560U JP42689U JP42689U JPH0292560U JP H0292560 U JPH0292560 U JP H0292560U JP 42689 U JP42689 U JP 42689U JP 42689 U JP42689 U JP 42689U JP H0292560 U JPH0292560 U JP H0292560U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- bias
- input
- multiplication
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Amplifiers (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
Description
第１図はこの考案の実施例を示す回路図、第２
図はその他の例を示す回路図、第３図は従来の乗
算器を示すブロツク図である。
Figure 1 is a circuit diagram showing an embodiment of this invention, Figure 2 is a circuit diagram showing an embodiment of this invention.
The figure is a circuit diagram showing another example, and FIG. 3 is a block diagram showing a conventional multiplier.
Claims (1)
ルに変換するデユーテイ変換器と、 上記引算回路の出力と上記デユーテイ変換器の
出力とを掛算する掛算回路と、 上記引算回路の出力に上記第２入力のバイアス
を掛算する乗算回路と、 上記掛算回路の出力と上記乗算回路の出力とを
引算する減算回路とを具備する乗算器。[Claims for Utility Model Registration] A subtraction circuit that subtracts a bias from a first input, a duty converter that converts a second input with a bias into a duty cycle, and an output of the above subtraction circuit and the above. a multiplication circuit that multiplies the output of the duty converter; a multiplication circuit that multiplies the output of the subtraction circuit by the bias of the second input; and a subtraction circuit that subtracts the output of the multiplication circuit and the output of the multiplication circuit. A multiplier comprising a circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP42689U JPH0517716Y2 (en) | 1989-01-06 | 1989-01-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP42689U JPH0517716Y2 (en) | 1989-01-06 | 1989-01-06 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0292560U true JPH0292560U (en) | 1990-07-23 |
| JPH0517716Y2 JPH0517716Y2 (en) | 1993-05-12 |
Family
ID=31199442
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP42689U Expired - Lifetime JPH0517716Y2 (en) | 1989-01-06 | 1989-01-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0517716Y2 (en) |
-
1989
- 1989-01-06 JP JP42689U patent/JPH0517716Y2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0517716Y2 (en) | 1993-05-12 |
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