JPH02914Y2 - - Google Patents

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Publication number
JPH02914Y2
JPH02914Y2 JP1988116859U JP11685988U JPH02914Y2 JP H02914 Y2 JPH02914 Y2 JP H02914Y2 JP 1988116859 U JP1988116859 U JP 1988116859U JP 11685988 U JP11685988 U JP 11685988U JP H02914 Y2 JPH02914 Y2 JP H02914Y2
Authority
JP
Japan
Prior art keywords
foil
conductive foil
aluminum
conductive
copper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1988116859U
Other languages
Japanese (ja)
Other versions
JPS6454360U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988116859U priority Critical patent/JPH02914Y2/ja
Publication of JPS6454360U publication Critical patent/JPS6454360U/ja
Application granted granted Critical
Publication of JPH02914Y2 publication Critical patent/JPH02914Y2/ja
Expired legal-status Critical Current

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  • Parts Printed On Printed Circuit Boards (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)

Description

【考案の詳細な説明】 この考案は、基板上に銅箔とアルミニウム箔と
が密着積層されて夫々の金属面が所望する回路パ
ターンに応じて選択的に露出されて接合部面が形
成された混成集積回路基板に関する。
[Detailed explanation of the invention] In this invention, a copper foil and an aluminum foil are laminated in close contact with each other on a board, and the metal surfaces of each are selectively exposed according to the desired circuit pattern to form a joint surface. The present invention relates to a hybrid integrated circuit board.

(従来技術) 抵抗、その他の回路素子と各種半導体等を同一
基板上に接合する場合、被接合部品に応じてボン
デイング接合と半田接合が併用される。
(Prior Art) When bonding resistors, other circuit elements, and various semiconductors onto the same substrate, bonding and soldering are used in combination depending on the parts to be bonded.

而して従来の混成集積回路基板は基板の絶縁層
上に接着剤層を介して銅箔層を形成すると共にこ
の表面にメツキ法によつてニツケル渡金層を設け
て選択的にエツチングして所望の回路接合部面を
形成したもの(特公昭52−3461及び特公昭53−
17747)又はアルミニウム蒸着メツキによりボン
デイング接合部面を形成したもの(特開昭51−
28662)が公知である。
In conventional hybrid integrated circuit boards, a copper foil layer is formed on the insulating layer of the board via an adhesive layer, and a nickel metal layer is provided on this surface by a plating method and then selectively etched. Those with the desired circuit joint surface formed (Special Publication No. 52-3461 and Special Publication No. 53-
17747) or one in which the bonding joint surface is formed by aluminum evaporation plating (Japanese Unexamined Patent Publication No. 1774-
28662) is publicly known.

前者はメツキ設備を必要とする他、メツキ層の
厚さ管理が困難であるのに加えてニツケルメツキ
層の接合力が弱くボンデイング条件も制約される
などの欠点がある。
The former requires plating equipment, and has drawbacks such as difficulty in controlling the thickness of the plating layer, and the bonding force of the nickel plating layer is weak, which limits bonding conditions.

また、後者の場合は超音波ワイヤーボンデイン
グにおいて高分子樹脂絶縁層のために超音波の逃
げ現象が起り、十分なボンデイングが不可能であ
つた。
Furthermore, in the latter case, during ultrasonic wire bonding, an ultrasonic wave escape phenomenon occurred due to the polymer resin insulating layer, making it impossible to perform sufficient bonding.

(目的) 本案はアルミニウム基板の表面に絶縁層を介し
て半田接合に好適な銅箔膜による接合部面とボン
デイング接合に好適なアルミニウム箔膜による接
合部面とを所望の回路パターンに応じて任意に形
成でき、放熱性に優れた混成集積回路基板を提供
するものであり、更に回路設計を容易にするため
必要に応じて上記各箔膜層のどちらをも上面層又
は下面層とすることができる回路基板を提供する
ものである。
(Purpose) This project is designed to connect the surface of an aluminum substrate with a copper foil film suitable for solder bonding and an aluminum foil film suitable for bonding via an insulating layer on the surface of an aluminum substrate according to a desired circuit pattern. The present invention provides a hybrid integrated circuit board that can be formed into a single layer and has excellent heat dissipation properties.Furthermore, in order to facilitate circuit design, either of the above-mentioned foil film layers can be used as an upper surface layer or a lower surface layer as necessary. The purpose is to provide a circuit board that can be used.

(構成) 本案回路基板の構成は銅箔又はアルミニウム箔
による所望厚さの第1導電箔と、アルミニウム箔
又は銅箔による所望の厚さの第2導電箔がアルミ
ニウム基板表面上に形成された熱伝導性無機粉体
含有有機系高分子による絶縁層上に密着して積層
されて銅箔とアルミニウム箔との積層箔膜として
構成され、前記第1導電箔は前記第2導電箔を溶
解しない第1エツチング剤によつて所定の接合部
面を備えた所望の回路パターンに形成されると共
に前記第2導電箔は前記第1導電箔を溶解しない
第2エツチング剤によつて所定の接合部面を備え
た所望の回路パターンに形成されてなるものであ
る。
(Structure) The structure of the proposed circuit board is that a first conductive foil of a desired thickness made of copper foil or aluminum foil, and a second conductive foil of a desired thickness made of aluminum foil or copper foil are formed on the surface of the aluminum substrate. The first conductive foil is laminated in close contact with an insulating layer made of an organic polymer containing conductive inorganic powder to form a laminated foil film of copper foil and aluminum foil, and the first conductive foil has a second conductive foil that does not dissolve the second conductive foil. A desired circuit pattern with a predetermined joint surface is formed using an etching agent, and the second conductive foil has a predetermined joint surface formed with a second etching agent that does not dissolve the first conductive foil. It is formed into a desired circuit pattern.

本案においてアルミニウム基板上に形成される
絶縁層は、エポキシ樹脂、フエノール樹脂、シリ
コン樹脂、ポリイミド樹脂等の有機系高分子とベ
リリア、ボロンナイトライド、アルミナ、マグネ
シア、シリカ等の熱伝導性の無機粉体を前記有機
系高分子に高充填した複合材であつて熱伝導性が
高く、超音波が逃げる現象も少ないことから本案
の絶縁層材として好適である。この複合材を金属
基板上に形成したものは熱伝導性が良く大容量混
成集積回路の基板として最適である。
In this case, the insulating layer formed on the aluminum substrate consists of organic polymers such as epoxy resin, phenolic resin, silicone resin, and polyimide resin, and thermally conductive inorganic powders such as beryllia, boron nitride, alumina, magnesia, and silica. It is a composite material in which the body is highly filled with the organic polymer, has high thermal conductivity, and has little phenomenon in which ultrasonic waves escape, so it is suitable as the insulating layer material of the present invention. This composite material formed on a metal substrate has good thermal conductivity and is ideal as a substrate for large-capacity hybrid integrated circuits.

また、第1導電箔又は第2導電箔としてのアル
ミニウム層及び銅層の夫々厚さは0.1μ〜100μであ
つて所望厚さのアルミニウム−銅クラツド箔が用
いられる。
Further, the aluminum layer and the copper layer as the first conductive foil or the second conductive foil each have a thickness of 0.1 μm to 100 μm, and an aluminum-copper clad foil having a desired thickness is used.

なお本案回路基板においては半田付に必要な部
分及びアルミニウム線もしくは金線等によるワイ
ヤーボンデイングに必要な部分を除く回路部分は
第1導電箔又は第2導電箔のいずれかが露出して
いても良い。
In addition, in the proposed circuit board, either the first conductive foil or the second conductive foil may be exposed in the circuit parts except for the parts necessary for soldering and the parts necessary for wire bonding with aluminum wires, gold wires, etc. .

本案においてアルミニウムをエツチングしない
銅の選択エツチング剤としては、硫酸−過酸化水
素系エツチング剤(例えば荏原電産(株)のパーマエ
ツチ)もしくは過硫酸アンモニウムや過硫酸ソー
ダ等の過硫酸塩の水溶液が用いられる。
In this case, as a selective etching agent for copper that does not etch aluminum, a sulfuric acid-hydrogen peroxide etching agent (e.g., Perma-etch from Ebara Electric Corporation) or an aqueous solution of persulfate such as ammonium persulfate or sodium persulfate is used. .

また、銅をエツチングしないアルミニウムの選
択エツチング剤としては苛性ソーダ、苛性カリ等
の無機の強アルカリの水溶液に硝酸ソーダ等の硝
酸塩もしくは亜硝酸ソーダ等の亜硝酸塩を溶解し
たものが水素発生が少なくエツチングが良好であ
る。この他にクリンカー防止剤、アルミのキレー
ト化剤等を添加しても良い。
In addition, as a selective etching agent for aluminum that does not etch copper, a solution prepared by dissolving a nitrate such as sodium nitrate or a nitrite such as sodium nitrite in an aqueous solution of a strong inorganic alkali such as caustic soda or caustic potash produces less hydrogen and has good etching properties. It is. In addition, a clinker inhibitor, an aluminum chelating agent, etc. may be added.

本案におけるエツチング工程は第1図〜第3図
のようであつて、厚さ1.6mmのガラスエポキシ絶
縁性保持板1の表面に第1導電箔として厚さ
15μmのアルミニウム箔層2と、第2導電箔とし
て厚さ35μmの銅箔3を有するクラツド箔4が張
着されている場合先ず第2導電箔の銅箔表面にス
クリーン印刷によりエツチングレジストを形成し
た後、銅の選択エツチング剤によつてスプレーエ
ツチングしてから上記のエツチングレジストを除
去し銅回路3′を形成して半田接合部面5を形成
する。(第2図) 次に強アルカリに耐性のあるエツチングレジス
トを導電箔上に印刷した後、強アルカリ性エツチ
ング剤をスプレーして第1導電箔回路2′を形成
すると共にボンデイング接合部面6を形成する。
(第3図) (実施例) 第4図において、7は厚さ2mmのアルミニウム
基板であつて、その表面にラムダイト(電気化学
工業(株)製商品名)無機充填エポキシ樹脂(厚さ
100μm)8を介して前記したクラツド箔4の表裏
を反対にして張合せて第1導電箔(銅箔)回路9
と第2導電箔(アルミニウム箔)回路10を前記
エツチング工程を経て形成したものである。
The etching process in this case is as shown in Figs.
When a cladding foil 4 having a 15 μm aluminum foil layer 2 and a 35 μm thick copper foil 3 as a second conductive foil is attached, an etching resist was first formed on the copper foil surface of the second conductive foil by screen printing. Thereafter, spray etching is performed using a selective etching agent for copper, and the etching resist is removed to form a copper circuit 3' and a solder joint surface 5. (Figure 2) Next, after printing an etching resist that is resistant to strong alkali on the conductive foil, a strong alkaline etching agent is sprayed to form the first conductive foil circuit 2' and the bonding joint surface 6. do.
(Fig. 3) (Example) In Fig. 4, 7 is an aluminum substrate with a thickness of 2 mm, and the surface thereof is coated with inorganic-filled epoxy resin (trade name, manufactured by Denki Kagaku Kogyo Co., Ltd.).
A first conductive foil (copper foil) circuit 9 is formed by attaching the cladding foil 4 with the front and back sides of the cladding foil 4 interposed therebetween (100 μm) 8.
A second conductive foil (aluminum foil) circuit 10 is formed through the etching process.

(比較例) 実施例における回路基板のアルミニウム箔(第
2導電箔)に替えて厚さ1μmの金メツキ層及び厚
さ5μmのニツケルメツキ層を施したものについて
30μのアルミニウム線の超音波ワイヤーボンデイ
ング性を調べた結果を第5図に示す(ワイヤーボ
ンデイングは超音波工業ワイヤボンダUSW−
5Z60Sによる)。
(Comparative example) Regarding a circuit board in which a 1 μm thick gold plating layer and a 5 μm thick nickel plating layer were applied instead of the aluminum foil (second conductive foil) of the circuit board in the example.
Figure 5 shows the results of examining the ultrasonic wire bonding properties of 30μ aluminum wire (wire bonding was performed using ultrasonic industrial wire bonder USW-
5Z60S).

縦軸はアルミニウム線の引張強度を横軸は超音
波出力を示すが本案実施例品ではメツキしたもの
よりも引張強度が高く且つばらつきも少ないこと
がわかる。このようにメツキした場合に引張強度
のばらつきが大きいことは、メツキ面の状態がワ
イヤーボンデイング性に著しい影響を与えるとい
うことであり、メツキによつてボンデイングパツ
ドを形成する場合には避けられないことが明らか
である。
The vertical axis shows the tensile strength of the aluminum wire, and the horizontal axis shows the ultrasonic output. It can be seen that the tensile strength of the example product of the present invention is higher than that of the plated one, and there is less variation. The large variation in tensile strength when plated in this way means that the condition of the plated surface has a significant effect on wire bondability, which is unavoidable when forming a bonding pad by plating. That is clear.

なお、実施例のアルミニウム回路の金線
(25μ)によるワイヤーボンデイング性をテスト
した。ワイヤーボンダーは海上電機NTCマニア
ルボンダ−WA1472を用い熱圧着/超音波併用に
て250℃で行なつたところ引張強度は約5gであ
り、ワイヤー切れであつた。このことから本案に
よるアルミニウム箔(15μ)の金線によるワイヤ
ーボンデイング性は充分であることがわかる。
The wire bondability of the aluminum circuit of the example using a gold wire (25μ) was tested. The wire bonder was a Kaiyo Denki NTC manual bonder WA1472, and when the wire bonding was carried out at 250° C. using a combination of thermocompression bonding and ultrasonic waves, the tensile strength was about 5 g, and the wire did not break. This shows that the aluminum foil (15μ) according to the present invention has sufficient wire bonding properties with the gold wire.

なお、本案においては第1導電箔と第2導電箔
との上下関係は任意に設定できるものであり、こ
れによつて上記の効果には影響がないことも確認
されている。
In addition, in the present invention, the vertical relationship between the first conductive foil and the second conductive foil can be set arbitrarily, and it has been confirmed that this does not affect the above effects.

(効果) 以上説明した通り本考案によれば、絶縁物層上
にアルミニウム−銅クラツド箔を積層した積層物
の選択エツチングを2度行なうだけで、銅および
アルミニウムの両方の金属表面を回路部品接合部
面として必要な部位にのみ任意に露出させて回路
を形成させることができるので合理的な回路設計
が可能になる。更に第1導電箔と第2導電箔の上
下関係を自由に選択でき、しかもその厚さを自由
に選定できるから電流容量に制約されない混成集
積回路基板が簡単に得られる。
(Effects) As explained above, according to the present invention, the metal surfaces of both copper and aluminum can be bonded to circuit components by performing selective etching twice on a laminate in which aluminum-copper clad foil is laminated on an insulating layer. Since a circuit can be formed by exposing only the necessary parts as desired, a rational circuit design becomes possible. Furthermore, since the vertical relationship between the first conductive foil and the second conductive foil can be freely selected and the thickness thereof can be freely selected, a hybrid integrated circuit board that is not restricted by current capacity can be easily obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図乃至第3図は回路形成過程を説明する回
路基板の模型的拡大断面図、第4図は他の実施例
品の拡大断面図第5図は超音波振動によるワイヤ
ーボンデイング時の出力と引張強度との関係を示
すグラフである。 4は積層クラツド箔、5,6は接合部面。
Figures 1 to 3 are schematic enlarged sectional views of a circuit board to explain the circuit formation process, and Figure 4 is an enlarged sectional view of another example product. Figure 5 is the output during wire bonding using ultrasonic vibration. It is a graph showing the relationship with tensile strength. 4 is the laminated cladding foil, 5 and 6 are the joint surfaces.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 銅箔又はアルミニウム箔による所望厚さの第1
導電箔と、アルミニウム箔又は銅箔による所望の
厚さの第2導電箔がアルミニウム基板表面の熱伝
導性無機粉体含有有機系高分子の絶縁層上に密着
して積層されて銅箔とアルミニウム箔との積層箔
膜として構成され、前記第1導電箔は前記第2導
電箔を溶解しない第1エツチング剤によつて所定
の接合部面を備えた所望の回路パターンに形成さ
れると共に前記第2導電箔は前記第1導電箔を溶
解しない第2エツチング剤によつて所定の接合部
面を備えた所望の回路パターンに形成されてなる
混成集積回路基板。
The first layer of desired thickness is made of copper or aluminum foil.
A conductive foil and a second conductive foil of a desired thickness made of aluminum foil or copper foil are laminated in close contact with an insulating layer of an organic polymer containing thermally conductive inorganic powder on the surface of an aluminum substrate. The first conductive foil is formed into a desired circuit pattern with a predetermined joint surface using a first etching agent that does not dissolve the second conductive foil, and the first conductive foil is formed into a desired circuit pattern with a predetermined joint surface. The second conductive foil is formed into a desired circuit pattern with a predetermined joint surface using a second etching agent that does not dissolve the first conductive foil.
JP1988116859U 1988-09-07 1988-09-07 Expired JPH02914Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988116859U JPH02914Y2 (en) 1988-09-07 1988-09-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988116859U JPH02914Y2 (en) 1988-09-07 1988-09-07

Publications (2)

Publication Number Publication Date
JPS6454360U JPS6454360U (en) 1989-04-04
JPH02914Y2 true JPH02914Y2 (en) 1990-01-10

Family

ID=31359783

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988116859U Expired JPH02914Y2 (en) 1988-09-07 1988-09-07

Country Status (1)

Country Link
JP (1) JPH02914Y2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002343241A (en) * 2001-05-10 2002-11-29 Toshiba Corp Method of forming phosphor screen metal back and image display unit

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50133462A (en) * 1974-04-15 1975-10-22
JPS5298634A (en) * 1976-02-16 1977-08-18 Hitachi Ltd Method of etching stratified films
JPS52151639A (en) * 1976-06-11 1977-12-16 Ibm Plating method of film
JPS5315755A (en) * 1976-07-28 1978-02-14 Fujitsu Ltd Manufacture of display panel electrode
JPS5317747A (en) * 1976-08-02 1978-02-18 Sasaki Mooru Kk Natural light inlet tube
JPS55150292A (en) * 1979-05-11 1980-11-22 Fujitsu Ltd Method of fabricating printed circuit board
JPS5760889A (en) * 1980-09-30 1982-04-13 Sharp Kk Method of producing circuit board

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50133462A (en) * 1974-04-15 1975-10-22
JPS5298634A (en) * 1976-02-16 1977-08-18 Hitachi Ltd Method of etching stratified films
JPS52151639A (en) * 1976-06-11 1977-12-16 Ibm Plating method of film
JPS5315755A (en) * 1976-07-28 1978-02-14 Fujitsu Ltd Manufacture of display panel electrode
JPS5317747A (en) * 1976-08-02 1978-02-18 Sasaki Mooru Kk Natural light inlet tube
JPS55150292A (en) * 1979-05-11 1980-11-22 Fujitsu Ltd Method of fabricating printed circuit board
JPS5760889A (en) * 1980-09-30 1982-04-13 Sharp Kk Method of producing circuit board

Also Published As

Publication number Publication date
JPS6454360U (en) 1989-04-04

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