JPH0290717A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To facilitate the control of the amplitude modulation of an output waveform and the output amplitude by providing a differential circuit formed by connecting a gate of the 4th field effect transistor(TR) to an output of a level shift circuit. CONSTITUTION:The device is provided with a differential circuit comprising the 1st, 2nd FETs Q1, Q2 whose sources are connected together, the 3rd FET Q3 whose drain is connected to the source electrode, and the 4th field effect TR Q4 whose drain is connected to the source of the 3rd FET Q3 and whose source is connected to a power terminal 5 connecting to the drain, and with a level conversion circuit converting the level of a high frequency PAM modulation signal and its DC level in the vicinity of the source potential of the 4th FET Q4, and also with a differential circuit connecting the gate of the 4th FET Q4 to a level shift circuit output. Thus, the pulse amplitude modulation as the laser modulation system and the optical output fluctuation compensation (output waveform envelope amplitude control) are easily implemented simultaneously.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device, and in particular to a semiconductor laser formed on a gallium arsenide substrate and composed of nine Schottky junction field effect transistors, and a driving integrated circuit. The present invention relates to a semiconductor integrated circuit device that can easily perform amplitude modulation of an output waveform and control the output amplitude.

[Conventional technology]

With the advancement of optical communication technology, the speed of semiconductor lasers as light sources has increased, and the effects of high-speed driving of L'P4 body lasers have been improved.'Nr
(hereinafter simply referred to as a laser driver).The modulation speed of these devices is several hundred Mb/s.
-L G b /s or higher speed characteristics are required.
%t) aA s laser driver and name) were developed in the US (telecommunications technique @5SD-85-140,1
985 IEEE GaAs ICSympos
ium) page 103).

Conventionally, the PCM method has been mainly used as a modulation method for lasers, but there is also a pulse wave modulation method (hereinafter referred to as PAM) that modulates the output amplitude at full speed.
is being considered.

A conventional GaAs laser driver will be described below with reference to the drawings.

FIG. 3 shows an equivalent circuit diagram of a GaAs laser driver according to the prior art.

In the conventional example shown in FIG. 3, nine field effect transistors Q1, . Q3 (hereinafter referred to as FETQl, Q3), and the gate, source, and nfc connected to the current source terminal 5.
FETQ2. Q4, the source of FETQI and FETQ2
A level shift diode DI is connected in series with the drain of DI.

A level shift diode D3 is connected in series between D2 and the source of FETQ3 and the drain of FETQ4.
．． 1) Two level shift circuits consisting of FET Q5 and D4, whose gates are connected to the cathodes of level shift diodes D2 and D4, respectively, whose source terminals are connected to each other, and whose drains are connected to power supply terminal 3. is read directly to output terminal 9 and 2 F E T Q
6 and the drain is FETQ5. It is connected to the source of Q6, and its source is connected to the power supply terminal 3, and its gate is connected to the current control terminal 7, and its drain is connected to the output terminal 91C, and its source is connected to the power supply terminal 5, Moreover, the gate is connected to the offset control terminal 8 and consists of 7jFETQ8.

Next, the operation of this conventional example will be explained.

FE'l'Ql, Q2 and diodes DI, D2 form a level shift circuit, and FETQ3. Q4 and diode l)3. D4 also forms a level shift circuit. FETQ5. Q6. Q7 constitutes the entire differential amplifier circuit using FET Q7 as a current source. By controlling the potential of the current control terminal 7, F'ETQ6 flows.
The t value can be controlled. PETQ8 is a FET for supplying an offset current for the output current flowing from the output terminal 9.
By controlling the potential of the offset current control terminal 8, the offset value of the output current can be controlled. The power supply terminal 4 is grounded, the power supply terminal 5 is connected to the potential of -5, 2■, and the EC
Compatibility with I level has been achieved. Also, input terminal l
is driven by normal ECL logic signals. That is, the logic high level is 10.7V, and the logic low level is -1.8V.
It is. Input terminal 2 is a complementary signal input terminal of input terminal 1, and when both positive and negative phase signals are prepared as input signals, signals having a reverse phase relationship are input to input terminals 1 and 2. In the case of single-phase input/drive, a reference voltage of -1.3 V is externally applied to the input terminal 2 for operation.

In the conventional example described above, a PCM-modulated pulse signal is applied as an input signal, the input signal is converted into an output current, and the laser diode is modulated with the PCM signal.

10,000, the output current of the PAM modulation chain is modulated by a fixed pulse train, and the pulse output amplitude is PA
It is necessary to apply fV3 to the M modulation signal. This P.A.M.
If all of the conventional examples shown in Fig. 4 are applied to the modulation method, PAM modulation is possible by inputting a fixed pulse train to the high-frequency PAM modulation signal gold 1 input terminal 1 to the current control terminal 5.

[Problems to be Solved by the Invention] The above-mentioned 7j PAM modulation scheme has the following drawbacks.

(The DC level of the PAM modulation signal applied to the 1111L flow control terminal 5 is about -5.2±IV, and it deviates greatly from the output level of a normal logic IC, so a special ultra-high-speed level is applied to the peripheral circuit.) Requires Summer Chivalry Circuit.

(2) In a normal laser driver, the temperature of the laser diode! To compensate for output fluctuations over time, a current control signal from an externally connected optical output monitor and automatic gain control circuit is input to the current control terminal 7 in FIG. A method is adopted to compensate for the optical output variation gnJ. Even if you use the PAMfi tone method,
Needless to say, for the output current waveform envelope 1, the above-mentioned optical output fluctuation compensation function is essential.

However, when applying the f'AMi tuning method to the conventional GaAs laser driver, as described above, the current source control terminal 7 is used as an input terminal for the high-speed PAM modulation signal and (3) the high-frequency signal. We also need a condition that satisfies the consistency condition Kanaya Eki. The internal impedance from the current control terminal 7 of the conventional example in FIG. 3 is fi”ET
This is largely determined by the input capacity. However, the gate width of FETQ7 is usually large because it is necessary to flow a large current.
Therefore, the input capacity f increases compared to a normal input terminal.

[Means for solving problems]

The logic integrated circuit of the present invention includes a first and second PET whose sources are connected to each other, a third FET whose drain is connected to the source electrode, and a third FET whose drain is connected to the source of the 30th FET and whose source electrode is connected to the power supply terminal. 7tJ4 field effect transistors connected to each other, and a level conversion circuit for converting the high frequency PAM conversion signal and its DC level to near the source potential of the FET J4; 4! It includes a differential circuit formed by connecting the gate of the FgT to the output of the level shift circuit. be a sign.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is an equivalent circuit diagram showing a first embodiment of the semiconductor integrated circuit device of the present invention. Power terminal 4 is connected to ground, and power terminal 5 is connected to -5.2V power! ! has been done.

F'ETQI, Q2 and diode DI, i) 2 and FE
TQ3. Similarly to the conventional example, Q4 and diodes D3 and D4 each form a level shift circuit. F
ETQ4. Q5 and diode D5. D6. D7 is a t level shift circuit added in this example! Completed, F'E
'The power supply terminal 6 to which the source of rQ5 is connected is -6 to -7
The circuit constant of this level shift circuit is that the potential generated at the drain of ETQ6 is connected to the input terminal 3.
[When ECL logic Koshinbaku -1,3V is applied, -5
, about 2V.

F E 'r Q 6 and 97 form a pair of transistors of a differential amplifier I crystal similar to the conventional example, and FETQ6 and Q7
The source electrodes of the FETQ8 are connected to each other, the gate of the source electrodes is connected to the current control terminal 7, the drain of the 7HFETQg is connected, and the source of the FETQ8 is
The source is connected to the drain of Q5, the source is connected to the power supply 5, and the drain of F'E'l'Q9 for 7jPAM modulation is connected. d
has been done.

The drain of FETQ7 is connected to output terminal 9, and
An offset current control FET QI□ is connected in the same manner as in the conventional example.

Next, the functions of this embodiment will be explained. FETQl,
Q2 and diode l)1. D2 and FETQ, 3°Q4
and diode D3. The functions of the two level shift circuits consisting of D4 are the same as in the conventional example and will not be described in detail. Input terminal l
A normal ECL level fixed pulse pattern is input to and 2, and a current pulse pattern / modulated with the same pulse pattern as the input fixed pulse pattern is output to the output terminal 9.

Input terminal 3 has PA input at normal ECL level.
A high frequency signal for M modulation is input, and FETQ4. Q5 and diode D5. D6. The signal is inputted to the gate of PETQ9 for PAM fF and N through a level shift circuit consisting of D7. The center value of the logic level after the level shift is -
The current between the drain and source of FETQ9, that is, the amplitude of the output current generated at the output terminal 9 is set to be about 5.2V. The contact line can be controlled by inputting a control bias to the current control terminal 7 connected to the gate of FET Q8, and it is possible to easily compensate for fluctuations in laser light output as described in the conventional example section. Ru.

The functions of the FET QIO and the offset control terminal 80 are the same as in the conventional example, and therefore will not be described in detail.

It can be input to FETs Q8 and Q9 at a high speed PAM conversion level.

Further, the FETQ14 can be designed independently as a normal high frequency input circuit, and the input capacitance can be easily reduced when viewed from the input terminal 3.

An equivalent circuit diagram of a second embodiment of the present invention is shown in FIG.

The configuration 1 function of this embodiment is basically the same as that of the first embodiment, except that the drain of the differential switch 'ETQ6 is connected to the complementary output terminal IO. This results in
The conventional output terminal 91C connects and modulates a laser diode as a load, and the complementary output terminals are designed with high frequency consideration and are used as a nine-waveform monitor circuit device. By connecting, there is an advantage that the high frequency current modulation waveform of the output can be observed in real time. When not used as a "complementary output 10K" monitor, it can be connected to the ground electrode 4 outside the integrated circuit to provide the same function as the circuit of Embodiment 10.
The power supply voltage is -5.2V, and the input signal level is E C
A/ to L V/ (/% A/ to L/ -0,8V,
Although only the case of the so-called ECL level (cxw;yvher-1,BV) has been described, it is clear that the circuit device of the present invention is also effective for integrated circuit devices operating at different power supply voltages and logic levels. be.

Furthermore, is there a high frequency signal at the PAM input terminal? It is also clear that the integrated circuit device of the present invention can be applied to the PCM modulation method similar to the conventional example by applying a high-level DC bias voltage without inputting it.

〔Effect of the invention〕

As explained above, the integrated circuit device for driving a conductor laser of the present invention has drains connected to mutually connected sources of differential pair transistors constituting a differential circuit for output current switching (for current control). 'ET and fgFk,
A differential circuit consisting of a PAMK tuning FET whose drain is connected to the '1' source and whose source is connected to the -s and zVt sources, and an ECU.

level input signal k -5,2V k A level shift circuit with logic center and the level shift circuit output as the PA
By connecting the current control terminal for M control, the following effects can be obtained.

(11) PAMi modulation as a laser modulation method and optical output fluctuation compensation (output' waveform envelope amplitude control) can be easily implemented simultaneously and independently.

(2) The high frequency PAM modulated human input signal is, for example, ECL
Since it can be input at a level such as , level matching with ordinary peripheral circuits is extremely easy.

(3) Since the PAM signal level shift circuit can be designed separately from the output differential circuit, it can easily solve the conventional problem of increased input capacitance of the PAM signal input terminal. .

[Brief explanation of the drawing]

1 and 2 are equivalent circuit diagrams of the first and g2 embodiments of the present invention, and FIG. 3 is an equivalent circuit diagram of the conventional example. 1.2...Input terminal, 3...Output amplitude modulation input terminal, 4,5.6...X source terminal, 7...
...Current control terminal, 8...Offset current control terminal, 9.10...Output terminal. Agent Patent Attorney Hara Uchi

Claims (3)

[Claims] (1) first and second field effect transistors formed on a gallium arsenide substrate and having their sources connected to each other;
A differential transistor consisting of a third field effect transistor whose drain is connected to the source electrode thereof, and a fourth field effect transistor whose drain is connected to the source of the third field effect transistor and whose source is connected to the power supply terminal. circuit, and a level shift circuit capable of level-converting a high frequency input signal and its DC level to near the source potential of the fourth field effect transistor, and the gate of the fourth field effect transistor is connected to the level shift circuit of the level shift circuit. A semiconductor integrated circuit device comprising a differential circuit connected to an output. (2) In the integrated circuit device according to item 1, the drain of the first (or second) transistor is connected to a power supply terminal that provides the highest potential, and the drain of the second (or first) transistor is connected to the 1. A semiconductor integrated circuit device, characterized in that the semiconductor integrated circuit device is connected to one output terminal. (3) The integrated circuit device according to item 1, wherein the drains of the first and second transistors are connected to second and third output terminals.