GB2139032A

GB2139032A - Low power consumption power amplifier

Info

Publication number: GB2139032A
Application number: GB08410120A
Authority: GB
Inventors: Tadashi Hanaoka
Original assignee: Citizen Watch Co Ltd
Current assignee: Citizen Watch Co Ltd
Priority date: 1983-04-26
Filing date: 1984-04-18
Publication date: 1984-10-31
Also published as: GB8410120D0; DE3415040A1; JPS59200510A; GB2139032B

Abstract

A power amplifier comprises an input amplifier circuit, and an output amplifier circuit including two series-connected complementary MOS transistors. One of said MOS transistors receives as a bias voltage the DC component of an output signal from said input amplifier circuit. The other MOS transistor receives a fixed bias voltage from a separate bias circuit. Both the MOS transistors receive the A.C. signal to be amplified from the input amplifier circuit. The bias voltages to the two transistors are set at the same small value, thereby maintaining the dynamic range, and at the same time, reducing quiescent power consumption. <IMAGE>

Description

SPECIFICATION Low power consumption power amplifier Background of the invention Field of the invention This invention relates to an improvement in or relating to a low power consumption power amplifier for amplifying an AC signal such as an audiosignal.

In general, a conventional circuit for driving an acoustic output device such as a loudspeaker, or a low-impedance load such as a synchronous motor, uses an output transformer as a direct means to supply such a load with as much electric power as required in such a way that the output transformer converts a voltage signal from a pre-stage electric power amplifier to a corresponding current signal for driving the load.

An output transformer, however, is disadvantageously heavy, and the reduction of its weight is liable to cause distortion of transmitted electric signals and, at the same time an adverse effect on the frequency characteristics of a whole apparatus.

Recently as a result of remarkable development in the field of semiconductor devices power amplifiers using bipolar transistors have been widely used, and there are many instances in which amplifiers are used to directly drive associated low-impedance loads without the agency of an output transformer. A variety of power amplifiers using bipolar transistors have been made as appropriate for different applications. In the majority of these bipolar transistor power amplifiers, however, use is made of a totem pole structure of bipolar transistors, or use is made of a complementary amplifier structure in which two complementary type bipolar transistors are series connected in circuit with a power supply. Therefore, such bipolar transistor power amplifiers disadvantageously have a reduced dynamic range for output voltage signal relative to a given power supply voltage.

In an attempt to extend the dynamic range a power supply of five or more volts is generally used.

Otherwise, a bootstrap circuit is used in case that a three-volt power supply, which is composed of a series-connection of two batteries, is used, and then relatively large capacity is required. A circuit using bipolar transistors requires the supply of bias current thereto for its proper operation, and therefore such a circuit tends to consume a significant amount of electric power in its quiescent state wherein an AC signal to be transmitted remains at zero volt. The quiescent power consumption tends to increase with the increase of the electric power which an amplifier can supply to an associated load (hereinafter referred to as "output power").Therefor, the power consumed in an amplifier on a quiescent state is after at an increased value much larger than power transmitted to an associated load in an electric apparatus wherein the maximum obtainable output power is considerably greater than that required for the normal range of input signals.

Owing to the relatively large power consumptions in the quiescent condition there must be provided any means appropriate for heat dissipation, and for the same reason a power supply so required becomes disadvantageously large. When batteries are used as a power supply, they will be consumed in a relatively short time.

These defects of a power amplifier using bipolar transistors can be overcome by using MOS transistors to some extent. For instance, the combination of two complementary type enhancement MOS transistors (referred to as "C-MOS structure") in an amplifier permits the expansion of the dynamic range of the output signal almost as wide as the range of associated power supply voltage, and, at the same time, the reduction of the bias currents in the parts other than the output stage of the amplifier to as small current as several microamperes to several tens. The increase of the maximum output power in an amplifier, however, inevitably causes the increase of the power consumption at the quiescent time, and therefore the power consumption in the amplifier cannot be substantially reduced with recourse to the prior art C-MOS structure.

Summary ofthe invention An improved power amplifier of "C-MOS structure" according to this invention is designed to save power consumption in its output stage at the quiescent time, and at the same time, is designed to produce a relatively high output voltage signal in spite of a relatively low voltage (about three-volt) power supply used.

The object of this invention is to provide an AC power amplifier which is designed to use a three or less volt power supply; reduce a quiescent power consumption to one or less miliwatts; and permit the supply of an AC voltage signal of fairly large amplitude to a relatively low-impedance load. Preferred embodiments according to this invention will be described hereinbelow with reference to the accompanying drawings.

Brief description of the drawings Figure 1 shows a low power consumption power amplifier according to this invention.

Figure 2 shows the operating characteristics of two transistors constituting together an output amplifier circuit in the low power consumption power amplifier of Figure 1.

Figure 3 shows the AC characteristics of two transistors constituting together an output amplifier circuit in the low power consumption power amplifier of Figure 1.

Figure 4 shows another embodiment of a low power consumption power amplifier according to this invention.

Figure 5 shows still another embodiment of a low power consumption power amplifier according to this invention.

Figure 6 shows an application of a power amplifier according to this invention to a loudspeaker driving circuit.

Figure 7shows a fourth embodiment of a low power consumption power amplifier according to this invention using "C-MOS" transistors to constitute a differential amplifier.

Figure 8 is a fifth embodiment of a low power consumption power amplifier according to this invention with an increased gain.

Detailed description of the preferred embodiments Figure 1 shows a first embodiment of this invention mainly composed of an input amplifier circuit 1 and an output amplifier circuit 2 encircled with dot-and-dash lines. The input terminal of the input amplifier circuit 1 is connected to the input terminal IN of the power amplifier whereas the output terminal of the input amplifier circuit 1 is connected to the input terminal of the output amplifier circuit 2. The input amplifier circuit 1 is connected to two power lines VDD and Vss.

The input terminal of the output amplifier circuit 2 is connected to the gate electrode of a first MOS transistor Tr, with a "P"-conductivity type channel (hereinafter referred to simply as "transistor"), and at the same time, to the gate electrode of a second MOS transistor with an "N"-conductivity type channel Tr2 (hereinafter referred to sim ply as "transistor") th rough an associated capacitor C1. A bias voltage Vg iS applied to the gate of the transistor Tr2 through an associated resistance R1. The drain electrodes of the transistors Tr1 and Tr2 are connected to the output terminal OUT of the apparatus.The source electrode and the substrate of the transistor Tr1 are connected to the first power line VDD whereas the source electrode and the substrate of the transistor Tr2 are connected to the second power line Vss.

With this arrangement the DC operating point of the output amplifier circuit 2 depends on the DC gate voltage VGP of the firsttransistorTr1 which is equal to the output of the input amplifier circuit 1 and the DC gate voltage VGN of the second transistor Tr2 which is equal to V5.

Figure 2 shows how the operating point of the output amplifier circuit 2 is determined by the DC gate voltage VGP of the first transistor Tr1 and DC gate voltage VGN of the second transistor Tr2. The abscissa of the graph represents the drain voltage VOD of the first transistor Tr1 and the drain voltage VDN of the second transistor Tr2 whereas the ordinate represents the drain current IDP of the first transistor Tra and the drain current IDN of the second transistor Tr2.

The curves 0 and (33 represent the drain voltage VDp-to-the drain current IDP relationship of the first transistor Tr1 whereas the curves (g and 0 represent the drain voltage VDN-to-the drain current IDN relationship of the second transistorTr2. When no load is connected to the output terminal of the power amplifier, the drain currents IDP and IDN of the transistors Tr1 and Tr2 are equal to each other, and therefore the DC operating point of these transistors is at the crossing at which the curve 0 or o4 reaches across thecurve 0 or Assume that the transistors Tr1 and Tr2 operate as indicated by the curves (3 and Q), and then the crossing point P1 of these curves indicates the DC operating point. Thus, the output voltage of the power amplifier varies about its center value which is equal to the drain voltage VOp1 of the abscissa of the crossing point P1.The drain current lop1 at the ordinate of the crossing point P1 flows to be consumed in the output amplifier circuit 2 at the quiescent time Assume that the bias voltage V5 iS lowered to cause the DC gate voltage VGN of the second transistorTr2 to get close to the voltage of the power line Vss, and then curve (2) of Figure 2 shifts down to the curve 0.

As a result the DC operating point comes to P2, thus substantially reducing the quiescent electric current.

The center value of the output voltage range, however, disadvantageously drifts towards one extremity, and accordingly, the dynamic range reduces. To improve this situation, for instance, the amplitude of the DC voltage applied to the input terminal IN of the power amplifier is varied so as to bring the DC gate voltage VGP of the first transistor Tr1 close to the voltage VDD of one of the power lines, thus causing the curve 0 to shift down to the curve (i9 . Then, the DC operating point comes to P3. Thus, the center value of the output voltage range is brought again to the center value between the voltages VDD and Vss of the power lines, not upsetting the situation wherein the quiescent electric power consumption is greatly reduced regardless of the impedance of an associated load.

Now, the AC characteristics of the power amplifier of Figure 1 is described.

Figure 3 is a graphic representation of the AC characteristics of the output amplifier circuit 3 of the whole power amplifier. The abscissa represents the gate voltage VGP of the first transistor Tr1 and the gate voltage VGN of the second transistorTr2 whereas the ordinate represents the drain current 1DP of the first transistor Tr1 and the drain current 1DN of the second transistor Tr2. The curve ( ) shows the relationship between the gate voltage VGP of the first transistor Tr1 and the drain current 1DP thereof whereas the curve ( ) shows the relationship between the gate voltage VGN of the second transistor Tr2 and the drain current IDN thereof.

These curves show that the drain currents 1DP and 1DN increase drastically with the increase of associated gate voltages when the voltage at the output terminal OUT of the power amplifier is kept at a given constant value. The amplitude of the quiescent electric current IDe is determined from the gate voltages at the operating points of the transistors Tr1 and Tr2. Assume that the potential appearing at one end of a load connected to the output terminal OUT of the power amplifier is kept equal to the center value of the output voltage range, and then application of AC voltage to the gate of each transistor will cause a great variation of the drain current in the transistor.

Specifically, the waveform VGP shows an AC component of the voltage signal directly applied to the gate of the first transistorTr1 by the input amplifier circuit 1 whereas the waveform VGN shows a signal applied to the gate of the second transistor Tr2 after eliminating the DC component from the same voltage signal as applied to the gate of the first transistor Tr1 with the aid of the capacitor C1. The waveforms iDP and iDN obtained by projecting the waveforms VGP and VGN to the ordinate via the curves 0 and (!3 show the variations of the drain currents in the transistors Tr1 and Tr2.As shown, the current waveforms 10P and jDN vary opposite to each other in polarity, and they are shifted half a period in phase. Therefore, a resultant waveform of these two current waveforms jDN and iDP appears across a load which is connected to the output terminal OUT of the power amplifier. The maximum amplitude of the electric current supplied to the load is determined by the impedance of the load and the voltage of the power supply, but the electric current flowing at the quiescent time is not directly related to these factors.

As is readily understood from Figure 3, the increase of the amplitudes of the AC voltage waveforms VGP and VGN causes a drastic increase of the peak values of the current waveforms jDP and jDN. A very small AC signal applied to the input terminal IN of the input amplifier circuit 1 is amplified therein before transmitted to the output amplifier circuit 1. With the preamplifying arrangement as shown in Figure 1 a good large value of electric current can flow in a load.

Some modifications of the power amplifier of Figure 1 are described below.

Figure 4 shows a second embodiment whose output amplifier circuit 2' includes transistors of the polarities opposite to those of the corresponding transistors in the output amplifier circuit 2 of the first embodiment of Figure 1. The signal from an input amplifier circuit 1 is applied directly to the gate electrode of a first transistor Tr3, which is composed of an "N"-channel MOS transistor. On the other hand, the same signal is applied through a capacitor C4to the gate electrode of a "P"-channel MOS transistor, which constitutes a second transistor Tr4. A bias voltage VB, iS applied to the gate electrode of the second transistor Tr4 via an associated resistor R1. The power amplifier of Figure 4 functions in a similar way to the first embodiment, and therefore the explanation of the operation of the second embodiment is omitted.

Figure 5 shows a third embodiment whose AC power amplifier circuit is improved from the practical point of view. Specifically, an input amplifier circuit is composed of a differential amplifier 3, and an output power amplifier circuit 2" includes a simple voltage stabilizer circuit composed of a "P"-channel MOS transistor Trs with its gate and drain electrodes connected together and an associated resistor R2 for generating a bias voltage to be applied to the gate electrode of a second transistor Tr4.

As shown, the differential amplifier 3 has two input terminals, that is, non-reverse (+) and reverse (-) terminals. A signal when applied to the reverse terminal (-) of the differential amplifier 3 is reversed and amplified therein, and is again reversed and amplified in the output amplifier circuit 2" before appearing at the output terminal OUT of the power amplifier.

On the other hand, a signal applied to the non-reverse terminal (+) of the differential amplifier 3 is amplified therein, and then the amplified signal is reversed and amplified in the output amplifier circuit before appearing at the output terminal OUT of the power amplifier. When viewed from the DC point of view, the combination of the differential amplifier 3 and the output amplifier circuit 2" is equivalent to an operation amplifier, but it is characterized by the fact that the equivalent operation amplifier has different open-loop gains for DC and AC signals because an AC coupling capacitor C1 is used in the output amplifier circuit 2".

These different gains, however, are so large that this circuit arrangement when used as an AC amplifier as is the case with the embodiment of Figure 5 may be regarded as an AC amplifier using an ordinary operation amplifier.

As shown in Figure 5, an AC signal is applied from a signal source 4 to the reverse input terminal (-) of the input amplifier 3 through a DC decoupling capacitor C2 and an input resistance R3. Also, a feedback signal is applied from the output terminal OUT of the power amplifier to the reverse input terminal (-) of the input amplifier 3 via a feedback circuit which is composed of a parallel connection of a resistance R4 and a capacitor C3. In this reverse amplifier the voltage VDe appearing at the output terminal OUT of the power amplifier at the quiescent time is equal to the reference voltage VGND appearing at the non-reverse terminal (+) of the input amplifier. Therefore, the operating point of the power amplifier can be easily put at a desired voltage by selecting the reference voltage VGND appropriately.The feedback circuit may be composed of a diode in place of a parallel connection of capacitance and resistance.

With this circuit arrangement no electric current will be supplied to a load L at the quiescent time if one end of the load is held at the reference voltage VGND, and if the other end of the load is connected to the output terminal OUT of the power amplifier. Thus, the consumption of electric power at the quiescent time is most effectively saved. In case that the open-loop gain for AC signal is large as mentioned earlier, the AC amplification factor of the reverse amplifier equipped with a feedback circuit is equal to the ratio of the input resistance R4 to the feedback resistance R3 and therefore a desired amplification factor can be easily selected.

The feature of the output amplifier circuit is described below. In the output amplifier circuit the output voltage of the constant voltage circuit is applied to the gate electrode of the second transistor Tr4. The transistors Tr4 and Tr5 constitute together an electric current mirror circuit, and therefore the electric currents flowing in the transistors Tr4 and Tr5 will be in the proportional relationship with good reproducibility when the circuit is made in the form of integrated circuit. Thanks to this, a direct current flowing in the transistor Tr4, that is, a quiescent electric current can be easily determined by appropriately selecting the value of the resistance R2, and accordingly the circuit design is made easy.

The combination of the differential amplifier 3 and the output amplifier circuit 2" has as wide an application as an operation amplifier. For instance, it can function as a non-reverse amplifier when AC signals are applied to the non-reverse input terminal (t) of the input amplifier 3. Also, it can be an active filter by replacing the capacitor C2, the resistance R3 and the feedback circuit of capacitor C3 and resistance R4 by a network appropriate for the purpose.

Figure 6 shows one application of an AC power amplifier according to this invention to a loudspeaker driving circuit. As shown, it is made in the form of a BLT circuit, which is composed of two AC power amplifiers each comprising a differential amplifier 5 or 6 and an output amplifier circuit 7 or 8. More specifically, the loudspeaker driving circuit comprises a first amplifying circuit including a differential amplifier 5, an output amplifier circuit 7, a capacitor C4, resistors R5, R6 and R7, an input terminal IN and a first output terminal OUT1; and a second amplifying circuit including a differential amplifier 6, an output amplifier circuit 8, resistors R8 and Rg, an input terminal to which the output signal from the first amplifying circuit is applied, and a second output terminal OUT2.The first amplifying circuit is constructed as a non-reverse amplifier whose amplification factor G is determined from R1 + R2 R1 where R1 and R2 stand for the resistors R6 and R7. On the other hand the second amplifying circuit is constructed as a reverse amplifier, and associated resistors R8 and Rs are selected to be equal to each other so that the amplification factor of the reverse amplifier may be equal to -1.

With this arrangement a voltage signal G times as much as a voltage signal applied to the input terminal IN of the driver circuit appears at the output terminal OUT1 whereas a voltage signal G times as much as a voltage signal applied to the input terminal IN appears at the output terminal OUT2. Thus, electric power as required can be supplied to a small dynamic loudspeaker SP connected between the terminals OUT1 and OUT2.

Figures 7 and 8 show different embodiments wherein an input amplifier circuit is constructed in the form of C-MOS differential amplifier. In Figures 7 and 8, the positive terminal of a power supply is indicated by V00 whereas the negative terminal of the power supply is indicated by Vss. The reverse input terminal of the input amplifier is indicated by the symbol (3; ; the non-reverse input terminal of the input amplifier is indicated by the symbol 0 ; and the output terminal of the apparatus is indicated by OUT.

Referring to Figure 7, the apparatus is composed of three parts encircled with broken lines. The first part is composed of DC differential amplifier 9, which includes a "P"-channel MOS transistor Tr6,two P -channel MOS transistors Tr7 and Tr8 connected to two differential input terminals, and two "N"-channel MOS transistors Trg and Tr10 connected to the two amplifying transistors Tr7 and Tr8 as load resistors. The DC differential amplifier 9 provides an output signal at the joint between the drain electrode of the transistor Tr8 and the drain electrode of the transistor Trio.

The second part is composed of an output amplifier circuit 10, which comprises a first power transistor Tr11 that is, a large-sized "N"-channel MOS transistor; a second power transistor Tr12, that is, a "P"-channel MOS transistor whose channel width is about twice as broad as that of the first transistor Tr11; an AC coupling capacitor C5; a resistor R11 in circuit with a bias voltage applying circuit; and a feedback capacitor C6 for preventing the appearance of any high frequency.

The third part is composed of a constant voltage circuit 11 which comprises a "P"-channel MOS transistor Tr13 and a resistor R10. The voltage stabilizer supplies a bias voltage both to the transistor Tr6 in the differential amplifier 9 and the gate electrode of the second transistor Tr12 in the output amplifier circuit 10.

As shown in Figure 8, the power amplifier of Figure 7 is modified by adding a C-MOS amplifier circuit 12 between the output of the differential amplifier circuit 9 and the input of the output amplifier circuit 10, thereby increasing the open-loop grain of the apparatus. The amplifier circuit 12 is composed of a first inverter circuit including an "N"-channel MOS transistor Tr14 and an associated load resistance in the form of"P"-channel MOS transistorTr15; and a second invertercircuit including an "N"-channel MOS transistor Tr16 and an associated load resistance in the form of a "P"-channel MOS transistor Tr17, the first and second inverter circuits being connected directly to each other. The transistors Tr15 and Tr17 used as load resistance have an elongated length of channel relative to its width, and therefore their impedances are high enough to suppress the consumption of electric power to a fairly low value.

As is understood from the above, an AC power amplifier according to this invention has as wide a dynamic range as the voltage range of a power supply and a reduced amount of quiescent power consumption compared with the output power available. Still advantageouslythe use of a differential amplifier at an input stage in an AC power amplifier according to this invention permits setting the DC operating point voltage (the voltage appearing at the output terminal of the AC power amplifier at the quiescent time) as desired.

Also, the use of a feedback circuit facilitates the selection of amplification factor in designing. An AC power amplifier according to this invention can be made up in either form of non-reverse or reverse amplifier, and therefore a BLT circuit can be easily made. Necessary parts to constitute an AC power amplifier according to this invention are limited to MOS transistors, resistances and condensers, and therefore it can be easily made in the form of C-MOS integrated circuit, and hence in miniature size. Thus, an AC power amplifier according to this invention and digital circuits can be easily hybridized in the form of integrated circuit.

An AC power amplifier according to this invention can be advantageously used in a small-sized device which is designed to be equipped with batteries, such as a time-signalling wrist watch wherein a low impedance speaker is driven with a larger inner resistance battery.

While the present invention has been described with reference to the preferred embodiments thereof, it will be understood that any modification may be made within the scope of the following claims.

Claims

1. A low power consumption power amplifier comprising: an input amplifier circuit for amplifying an AC input signal; an output amplifier circuit including a first MOS transistor whose gate electrode is connected to the output terminal of said AC input amplifier circuit, a second MOS transistor of the polarity which is complementary to the polarity of said first MOS transistor, the gate electrode of said second MOS transistor being connected to the output terminal of said AC input amplifier circuit through an associated capacitor, the drain electrodes of said first and second MOS transistors being connected together to provide an output terminal, and the source electrodes of said first and second MOS transistors being connected to a first power line and a second power line respectively; and a bias voltage supply circuit for supplying an appropriate DC bias voltage to the gate electrode of said second MOS transistor.

2. A low power consumption power amplifier according to Claim 1, wherein said input amplifier circuit consists of a differential amplifier.

3. A low power consumption power amplifier according to Claim 1 or 2 wherein said bias voltage supply circuit consists of a constant-voltage circuit.

4. A low power consumption power amplifier according to Claim 3 wherein said constant-voltage circuit is composed of a current mirror circuit with respect to said second MOS transistor in said output amplifier circuit.

5. A low power consumption power amplifier according to any of Ciaims 1 to 4 wherein it further comprises a negative feedback circuit between the output terminal of said output amplifier circuit and the input terminal of said input amplifier circuit.

6. A low power consumption power amplifier according to Claim 5 wherein said negative feedback circuit includes a resistance.

7. A low power consumption power amplifier according to Claim 1 wherein said input amplifier circuit and said output amplifier circuit are of a monolithic structure.

8. A speaker drive circuit comprising of two power amplifiers as defined in Claim 1 connected to each other so as to supply complementary output signals from said two power amplifiers to be speaker connected between the output terminals of said two power amplifiers.

9. A low power consumption power amplifier constructed and arranged substantially as hereinbefore described with reference to Figures 1 to 5,7 and 8 of the accompanying drawings.

10. A power driven circuit substantially as herein described with reference to and as shown in Figure 6 of the accompanying drawings.