JPH0287646A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To simplify isolation of an element and a passivation manufacturing process on the side of the element and to reduce damage of the element caused by a manufacturing process by a method wherein a recessed part in a semiinsulating compound semiconductor substrate is filled with a compound semiconductor layer of a laminated structure and this constitutes the element. CONSTITUTION:A protective film 14 having a window 14a is formed on a semiinsulating compound semiconductor substrate 11; by an etching operation using the protective film 14 as a mask, a recessed part 15 whose bottom 15a is as wide as or wider than the window 14a is formed in the substrate 11. A compound semiconductor layer 13 of a laminated structure is grown in the recessed part 15 by molecular beam epitaxy using an organic metal gas as a molecular beam in a state that the substrate 11 is provided with the protective film 14.

Description

[Detailed Description of the Invention] [Summary] Regarding a compound semiconductor device using a semi-insulating compound semiconductor as a substrate and a method for manufacturing the same, the present invention simplifies the manufacturing process when isolation of the element or passivation of the side surface of the element is required, and In order to reduce damage to elements during the manufacturing process, the semiconductor device has a recess in a semi-insulating compound semiconductor substrate, the recess is filled with a compound semiconductor layer having a stacked structure, and the compound semiconductor layer In the manufacturing method, on a semi-insulating compound semiconductor substrate,
A process of providing a protective film having a window and etching using the protective film as a mask to form a concave portion on the substrate whose bottom surface is as wide as or wider than the window, and a state in which the protective film is attached to the substrate. and a step of growing a layered compound semiconductor layer in the recess by molecular beam epitaxy using an organometallic gas as a molecular beam.

[Industrial application field]

The present invention relates to a compound semiconductor device using a semi-insulating compound semiconductor as a substrate and a method for manufacturing the same.

In semiconductor devices, compound semiconductors have come to be used to improve transistor characteristics and expand functions such as optical devices.

In that case, it is desirable to simplify the manufacturing process and reduce damage to the element caused by the manufacturing process.

[Conventional technology]

FIG. 8 (al to (el) are side sectional views in the order of steps of a conventional manufacturing method of a compound semiconductor device using a semi-insulating compound semiconductor for the substrate.

The figure shows a case where a plurality of compound semiconductor elements 2 are arranged on a semi-insulating compound semiconductor substrate 1. The elements 2 are formed of compound semiconductors with a stacked structure, and HE M T (H
4gh Electron l'1ability T
transistor) HB T (Heterojun
Bipolar Transistor)
, HET (Hotelectron Transis)
tor) + BET (Ballis-tic Ele
ctron Transistor), RHET
(Resonant Tunneling Hote
(electron transistor), RB
T (Resonant Tunneling Bip
These include transistors such as olar transistors, and optical elements such as semiconductor lasers and photodiodes.

In FIG. 8, a compound semiconductor layer 3 having a multilayer structure for forming an element 2 is grown on a substrate 1, with reference to (al). Since the hetero-interface of the
MOCVD).

Next, referring to (b), a protective film 4 is formed on the semiconductor layer 3 to cover only the region where the element 2 is to be formed. Then (C1
Referring to FIG. 1, a groove 5 for isolating the element 2 is formed by etching using the protective film 4 as a mask.

Next, referring to (d), in order to passivate the side surface of the element 2, a passivation layer 6 is formed by filling the groove 5 with an insulating material such as a semi-insulating semiconductor or polyimide. After this, the protective film 4 is removed (as shown in EL), and electrodes (not shown) are formed to complete the desired semiconductor device.

[Problem to be solved by the invention]

However, the above-described conventional manufacturing method has the problem that the process is complicated due to isolation and passivation of the element 2, and the side surfaces of the element 2 are easily damaged during etching to form the groove 5.

Therefore, the present invention simplifies the manufacturing process for compound semiconductor devices that use semi-insulating compound semiconductors as substrates when isolation of the elements or passivation of the sides of the elements is required, and reduces damage to the elements during the manufacturing process. The purpose is to provide a structure and its manufacturing method.

It is.

The above object, as shown in FIG. 1, has a recess 15 in a semi-insulating compound semiconductor substrate 11, the recess 15 is filled with a compound semiconductor layer 13 having a laminated structure, and the compound semiconductor layer 13 is This problem is solved by the semiconductor device of the present invention in which the element 12 is formed, and as shown in FIG. 2, a protective film 14 having a window 14a is provided on the semi-insulating compound semiconductor substrate 11. By etching using the window 14 as a mask, the bottom surface 15a of the substrate 11 is etched so that the bottom surface 15a becomes the window 14a.
The recess 15 is formed with a width equal to or wider than that of the recess 15, and with the protective film 14 attached to the substrate 11, the recess 15 is formed by molecular beam epitaxy using an organometallic gas as a molecular beam.
This problem is solved by the manufacturing method of the present invention, which includes a step of growing a compound semiconductor layer 13 having a stacked structure in the semiconductor layer 5.

[Means to solve the problem]

FIG. 1 is a sectional side view of a main part of an embodiment of a semiconductor device, and FIG.
l ~ (C1 is a process order side sectional view of the manufacturing method example,
According to the above structure, the semiconductor layer 13 forming the element 12 is formed by filling the recess 15, and a part of the substrate 11 functions as isolation and bathonvation for the element I2. ~The process of forming the John layer 6 is not necessary, and the manufacturing process is simplified. However, since there is no need to etch the semiconductor layer 13 for isolation, there is no damage to the side surfaces of the element 12, and damage to the element I2 is reduced.

The problem here is that the semiconductor layer 1 filling the recess 15
3 is a desirable laminated structure, that is, the Peter interface is steep and can be flat over the entire width of the recess 15.
The above manufacturing method solves this problem.

FIG. 3 (al~(C1) is a side sectional view illustrating growth in a recess according to the present invention.

In the figure, the recess 15 is formed by, for example, the method described below.
The bottom surface 15a is formed to have a width equal to or wider than the window 14a of the protective film 14.

Growth in the recess 15 by molecular beam epitaxy (referred to as gas source MBE) using an organometallic gas as a molecular beam has the following characteristics.

That is, referring to fal, (1) Since the molecular beam MB has a straight propagation property, it does not enter the side surface 15b of the recess 15 that is in the shadow of the window 14a.

■ Molecules M that have passed through the window 14a and reached the bottom surface 15a between molecular beams undergo a chemical reaction when forming an epitaxial layer, so the migration on the surface is much larger than in the case of normal MBE, and the molecules M reach the entire surface of the bottom surface 15a. It spreads to

■ The above migration is performed on the bottom surface 15a and the side surface 15b.
The side surface 15b is blocked by the kink site at the boundary with
Never climb up.

From this, the semiconductor layer 1 which is the first layer of the semiconductor layer 13
3a is formed flat over the entire width of the recess 15, as shown in (b).

Hereinafter, each semiconductor layer after the second layer (semiconductor layer 13b) is similarly formed flat. Considering the supply form of the molecule M during this growth, the heterointerface between the individual semiconductor layers becomes steep as in the case of normal MBE.

The semiconductor layer 13 thus formed has a desired multilayer structure. It goes without saying that this multilayer structure can include a superlattice structure.

By the way, this growth can be measured by ordinary MBE, MOCVD,
Alternatively, when the growth is performed using another growth method such as LP-MOCVD, the growth of the first layer in the recess 15 is the growth of the fourth layer.
The semiconductor layer 13 becomes as shown in FIGS. 13A to 13C, and the semiconductor layer 13 cannot be as desired.

That is, in FIG. 4, (a) is the case of normal MBE, in which the semiconductor layer 13a does not spread over the entire bottom surface 15a.

(bl is for MOCVD, and due to the non-straight propagation of the reaction gas, the semiconductor layer 13a also grows on the side surface 15b, making it uneven and narrowing the window for subsequent growth.
C) is the case of L P -MOCV D, in which the window is not narrowed, but the semiconductor layer 13a also grows on the side surface 15b and is not flat.

〔Example〕

Embodiments of the present invention will be described below with reference to FIGS. 1, 2, and 5 to 7. Figures 1 and 2 (a) -
As mentioned above, (C) is a side cross-sectional view of the main part of the semiconductor device embodiment and a step-order side cross-sectional view of the manufacturing method embodiment, and FIG. 6(a) and 6(b) are side sectional views for explaining an example of a compound semiconductor layer when the device of the embodiment is a semiconductor laser, and FIG. 7(
al (b) is a side sectional view of an example of a compound semiconductor layer when the element of the example is a photodiode.

In FIG. 1, 11 is semi-insulating GaAs (SI-G
aS) or a semi-insulating compound semiconductor substrate made of semi-insulating 1nP (SI4nP);
The recess formed in 1 and 13 are compound semiconductor layers having a multilayer structure filled in the recess 15 by epitaxial growth.

The semiconductor layer 13 forms a compound semiconductor element 12,
The element 12 is the transistor or optical element mentioned above in connection with the element 2.

The manufacturing of this semiconductor device is carried out as follows. First, referring to FIG. form 14. The protective film 14 is made of SiNx or SiOx and has a thickness of about 1,000 At. Further, the window 14a is arranged so that the side surface of the element 12 is in the (110) direction.

Next, referring to FIG. 2 (bl), by etching using the protective film 14 as a mask, a recess 15 is formed in the substrate 11 so that the bottom surface 15a is as wide as or more than the window 14a.

That is, when the substrate 11 is made of GaAs, an ammonia-based etching solution (for example, INH4OH/IHzOz/
5) By wet etching using (zO) or a sulfuric acid-based etching solution (for example, 4H2S○a/J, H202/]H20), the side surface 15b is inclined and the bottom surface 15a is formed as shown in FIG. 5(a). A recess 15 with a wide width is obtained, and t'BE (
Reactive Ion Beam tEjching
), a four part 15 is obtained in which the side surfaces 15b are vertical and the width of the bottom surface 15a is approximately equal to the width of the window 14a, as shown in FIG. 5 (bl).

When the substrate 11 is rnP, the fourth part 15 shown in FIG. 5(a) is obtained by wet etching using a bromine-methanol based etching solution (for example, Br2 CH30H), and by wet etching using a hydrochloric acid based etching solution (for example, HCI/HNO3). By wet etching using HCI/H20), the recess 15 shown in FIG. 5 (bl) is obtained.

Next, referring to FIG. 2(C), a protective film 14 is applied to the substrate 11.
Gas source M using the following molecular beam source with
A multilayer semiconductor layer 13 is grown in the recess 15 by BE. As described above, this multilayer structure has a steep Peter interface and is flat over the entire width of the recess 15.

Here, the Ga molecular beam source is TEGa or TMGa, the old molecular beam source is TEAI or T I BAI, and the As molecular beam source is As4, 8S2 (Taratsuka cell) or AS2 (Asj (thermal decomposition of 3). things), I
The molecular beam source for n is TMrn, and the molecular beam source for P is p2 (PH
3), the molecular beam source of Si which becomes the n-type impurity is Si2H6 or TESi, and the molecular beam source of Si which becomes the n-type impurity is Zn, which becomes the p-type impurity.
Molecular beam sources include DEZn, and by combining these, desired GaAs, AlGaAs, In
P, Ga1nAs, Ga1nPAs, etc. can be grown. And the growth rate is about 0.1μm/h
That's about it. Note that when irradiating molecular beams for growth, the growth chamber is evacuated so that the background pressure is about 10-8 Torr, similar to normal MBE.

After this, the protective film 14 is removed and the structure shown in FIG.
A desired semiconductor device is completed by forming electrodes (not shown) and the like. Note that the material of the protective film 14 is SiNx or SiO.
In the case of x, the protective film 1 is formed when forming the semiconductor layer 13.
Semiconductor is rarely deposited on the protective film 14, but even if this deposition occurs due to the use of other materials, the protective film 14
This is not a problem because it is turned off when the [Riff] is removed.

As is clear from the above steps, in this semiconductor device, the semiconductor layer 13 forming the element 12 is formed by filling the recess 15, and a part of the substrate 11 functions as isolation and pansication for the element 12. The process of forming the passivation layer 6 described above is unnecessary, and the manufacturing process is simplified.

However, since there is no need to etch the semiconductor layer 13 for isolation, there is no damage to the side surfaces of the element 12, and damage to the element 12 is reduced.

Furthermore, when creating an integrated circuit in which a plurality of elements 12 are arranged, it is easier to narrow the isolation area between the elements than in the conventional method from the viewpoint of manufacturing technology, and the It is possible to increase the degree of integration. On the other hand, in the case of a single element, it goes without saying that it is sufficient to increase the width of the isolation region and scribe there.

Now, regarding the element 12, since there are a wide variety of transistors, the semiconductor layer 13 will be explained using an optical element as an example.

Figure 6 +a) (b) shows an example of the semiconductor layer 13 when the element 12 is a semiconductor laser, (ill is when the substrate 11 is 5T-InP, (b) is when the substrate 11 is 5L-GaA
This is the case for s.

Figure 6 (in al, 21 is n -In which becomes the cladding layer)
P layer (2 μm thick), 22 is a non-doped Ga1nAs layer (0.1 μm thick) which becomes an active layer, and 23 is a p-InP layer (2 μm thick) which becomes a cladding layer. The window 14a is grown sequentially by source MBE, and the width of the window 14a is 1 μm. Note that the conductivity types of the cladding layers 21 and 23 may be opposite to those described above.

Figure 6 (in bl, n-ΔlG where 24 is the cladding layer)
aAs layer (2 μm thick), 25 is a non-doped GaAs layer (0.1 μm thick) which becomes an active layer, and 26 is a p-AIGaAsi layer (2 μm thick) which becomes a cladding layer. It was grown sequentially by BE. However, prior to its growth, LP-M
A non-doped AlGaAs layer 27 (thickness 2
．． um) is grown on the active layer 25 side'>;:
The light is also confined at point i. window 1
The width of 4a is 1 μm. Note that the cladding layers 24 and 2
The conductivity type 6 may be opposite to the above.

The above is BH (Illuried Hetro-stru
However, since gas source MBE can grow a superlattice-level thin layer with good controllability, it is possible to grow a thin layer at the superlattice level with good controllability.
Well) laser and GRIN-S CH (Grad
ed4ndex Waveguide and 5ep
arate Carrier and 0pti
cal Confinment Hetro-s
It is also possible to form the semiconductor layer I3 of the laser.

FIG. 7 (al) shows an example of the semiconductor layer 13 when the element 12 is a PIN photodiode, (a) shows an example of the semiconductor layer 13 when the substrate 11 is 5I-1nP, and (1+) shows an example when the substrate 11 is 5R
- This is the case of GaAs.

In FIG. 7(a), 31 is an n-InP layer (thickness 3 μm) which is an N layer, and 32 is a non-doped InGaAs layer which is a single layer.
layer (thickness: 3 μm), p -1nP layer where 33 is the P layer (
1 μm thick), these are the gas source MBEs mentioned earlier.
The width of the window 14a is 10μ.
It is m.

In Fig. 7 fb), 34 is the N layer of n-AIGaA
s layer (thickness 3 μm), non-doped Ga with 35 as one layer
As layer (thickness 3μm), 36 layers p- to become P layer
AIGaAsAIi (1 μm thick), which were grown sequentially by the gas source MBE described above.

However, prior to this growth, a non-doped AlGaAs layer 37 (thickness: 2 μm) is grown as in 27 of FIG. 6 (bl). The width of the window 14a is 110 At.

From the above explanation, even if the element 12 is the various transistors mentioned above, the semiconductor layer 1 of the multilayer structure for the element 12 is
It will be appreciated that 3 can easily be formed.

(Effects of the Invention) As explained above, according to the configuration of the present invention, in a compound semiconductor device using a semi-insulating compound semiconductor for the substrate,
A structure and a method for manufacturing the same are provided that simplify the manufacturing process when element isolation or side surface panning is required, and reduce damage to the element during the manufacturing process, thereby reducing the cost and improving the quality of the semiconductor device. It has the effect of making it possible.

[Brief explanation of the drawing]

FIG. 1 is a sectional side view of a main part of an embodiment of a semiconductor device, and FIG.
+ ~ (C1 is a step-order side sectional view of the manufacturing method example, Figure 3 (al ~ (C) is a side sectional view explaining growth in the recessed part according to the present invention, Figure 4 (al ~ (C) Figure 5(a) is a side cross-sectional view explaining the growth in the recess by another growth method (bl is for explaining the formation of the recess (!!,
! 11! Jr plane view, Figures 6(a) and 6(b) are side sectional views of an example of a compound semiconductor layer when the element of the example is a semiconductor laser, and Figure 7(a) (bl is a side sectional view of an example of a compound semiconductor layer when the element of the example is a photodiode Side sectional view of an example of a compound semiconductor layer in a certain case, No. 8
Figures (a) to (e) are step-by-step side sectional views illustrating an example of a conventional manufacturing method. In the figure, 1.11 is a semi-insulating compound semiconductor substrate, 2.12 is a compound semiconductor element (element), 3.13 is a compound semiconductor layer with a multilayer structure, 13a is a first layer semiconductor layer, and 4.14 is a semiconductor layer of the first layer. Protective film, 14a is window, 5 is groove, 15 is recess, 15a is bottom surface, 6 is banishment layer, 2nd layer, 23.24.26 is cladding layer, 22.25 is active layer, 31.34 is N layer, 32.35 is one layer, 33.36 is a P layer, MB is a molecular beam, and M is a molecule. On the day of mourning, Y's criticisms and deprivations of Y's rules and regulations, H prisoners, 5th example, n photo, ηq, and day auto, 7, JII&F, example of power and pigeon shelter, and kimono, cow guide, and soft layer example. Figure 6

Claims (1)

[Claims] 1) A recess (15) in a semi-insulating compound semiconductor substrate (11)
, and the recess (15) is a compound semiconductor layer (
13), and the compound semiconductor layer (13)
1. A semiconductor device comprising: forming an element (12). 2) A window (14) is formed on the semi-insulating compound semiconductor substrate (11).
a) is provided with a protective film (14), the protective film (14)
By etching using as a mask, the substrate (11) is etched with
a step of forming a recess (15) in which the bottom surface (15a) is as wide as or wider than the window (14a); By molecular beam epitaxy using gas, a layered compound semiconductor layer (1) is formed in the recess (15).
3) a step of growing a semiconductor device.