JPH0287234A - Information processing system - Google Patents

Abstract

PURPOSE:To execute fault processing to fault information from a correspondent information processor even when a fault processor breaks down by executing the fault processing, which responds to a fault detecting signal, in a self-device when the execution of the fault processing can not be executed in the other device. CONSTITUTION:When interruption is inputted from the information processor corresponding to a fault processor 2 to an interruption receiving part 21, an interruption request is issued from the interruption receiving part 21 to a processor part 22 of the self-device and a processor part 12 of the other device. When the processor part 22 of the self-device can not execute the interruption processing, the interruption processing is executed by the processor part 12 of the other device. Thus, even when the fault processor 2 breaks down, the fault processing to the fault information from the information processor, which corresponds to the fault processor 2, can be executed by the processor part 12 of the other device and the constitution of an information processing system can be speedily changed.

Description

TECHNICAL FIELD The present invention relates to an information processing system, and more particularly to an interrupt processing method from an information processing device to a faulty processor.

Conventionally, in an information processing system, a fault processing processor is provided corresponding to an information processing device, and the information processing device and the fault processing processor are in a one-to-one relationship. Therefore, processing for interrupts from an information processing device is performed only by the faulty processor corresponding to the information processing device.

In an information processing system consisting of multiple/') information processing devices, when a failure due to a failure of the information processing device is reported to the failure processing processor as an interrupt, the failure processing is performed by the failure processing processor by the interrupt, and
By disconnecting the information processing device from the system, it is possible to continue operating the system.

In such conventional information processing systems, there is a pairwise relationship between the information processing device and the fault processing processor, so
If the failure processing processor stops due to a failure etc.
Even if a failure occurs in the information processing device that corresponds to the faulty processor, it will no longer be possible to receive a failure report from that information processing device, and failure processing for the failure of the information processing device will have to wait until the faulty processor is recovered. Moreover, it has the disadvantage that it may have a negative impact on system operation.

OBJECTS OF THE INVENTION The present invention has been made in order to eliminate the drawbacks of the conventional ones as described above, and even if a failure processing processor fails, failure processing for a failure report from an information processing device corresponding to the failure processing processor is performed. The purpose is to provide an information processing system that can perform

Configuration of the Invention An information processing system according to the present invention is an information processing system including a plurality of information processing devices and a plurality of fault processing processors provided corresponding to each of the plurality of information processing devices. a sending means for sending a fault detection signal from a corresponding information processing device to the own device and other devices; a fault processing means for processing a fault in response to said fault detection signal; and a fault processing means for said functional device. Identification means for identifying the state is provided in each of the plurality of failure processing processors, and from the sending means of the functional device to the 11! When a fault detection signal is sent and the identifying means determines that the fault detection signal cannot be executed in the capable device, the self-device determines that the fault detection signal cannot be executed in response to the fault detection signal. This feature is characterized in that this is carried out by the fault handling means.

Husband 1] Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In FIG. , the interrupt reception is performed by the processor section 12.2 which processes the interrupt accepted by the section 11.21.
2.

Interrupt reception (=+ part 11.21 is in-processor internal)
It is connected to the processor unit 12.22 of its own device by Tough Ace 111.121, and the inter-processor interface 1
12 and 122, it is connected to a processor section 2212 of another device. Further, the processor units 12 and 22 are connected to each other by a processor status interface 101.

FIG. 2 is a flowchart 1 showing the operation of an embodiment of the present invention.
・It is. The operation of an embodiment of the present invention will be explained using FIG. 1 and FIG. 2.

First, the processor unit 12. of the fault processing processor 1.2.
22 are both capable of processing interrupts, when an interrupt from the information processing device corresponding to the fault processing processor 2 is input to the fault processing processor 2, the interrupt reception is handled by the fault processing processor 2. In addition to accepting the interrupt and registering the cause of the separate interrupt, the processor unit 22.
12 via the own processor interface 121 and the inter-processor interface 122.

The processor section 22 determines whether or not this interrupt request is a request from the section 21 (step 31 in FIG. 2), and if it is determined that the interrupt acceptance for the own device is a request from the section 21, the processor section 22 processes the interrupt. The request is accepted and interrupt processing is started (step 36 in FIG. 2).

On the other hand, the processor unit 12 of the faulty processor 1 determines that this interrupt request is not a request from the interrupt unit 11 of its own device (step 31 in FIG. (Step 32 in FIG. 2).

Through this reading, if it is determined that the state of the processor unit 22 of the other device is capable of handling an interrupt (step 3 in FIG.
3) In the processor section 12, the fault processing processor 2
When accepting an interrupt, no interrupt processing is performed in response to an interrupt request from the unit 21.

Next, when the processor unit 22 of the faulty processor 2 becomes unable to process interrupts due to a failure or other reason, the information processing device corresponding to the faulty processor 2 receives interrupts from the faulty processor 2. When an interrupt is input from , the interrupt acceptance unit 21 accepts the interrupt and registers the cause of the interrupt.
An interrupt request to the processor unit 22.12 is issued via the internal processor interface 121 and the inter-processor interface 122.

At this time, the processor unit 22 is in a state where it cannot process interrupts, and therefore does not accept this interrupt request.

On the other hand, the processor unit 12 of the faulty processor 1 determines that this interrupt request is not a request from the interrupt unit 11 of its own device (step 31 in FIG. (Step 32 in FIG. 2).

By reading this, the processor unit 12 determines whether the processor unit 22 of the other device is in a state where it can process an interrupt (step 33 in FIG. 2). If it is determined that the processor unit 22 is in a state where it cannot process an interrupt, the processor unit 12
When accepting an interrupt from the failure processing processor 2, the interrupt cause registered in the section 21 is retrieved to obtain detailed information about this interrupt request (step 34 in FIG. 2).

Further, the processor unit 12 identifies, from among the interrupt causes taken out from the interrupt acceptance unit 21, those that can be executed as an alternative to interrupt processing and those that cannot be executed (step 35 in FIG. 2).

If it is determined that the interrupt processing can be executed in place of the interrupt processing, the interrupt acceptance section 21 takes in the interrupt factor, accepts the interrupt request, and starts the interrupt processing (step 36 in FIG. 2).

If it is determined that the interrupt processing cannot be executed as a substitute, the interrupt cause of the interrupt acceptance section 21 is registered as is, and no interrupt processing is performed in response to the interrupt request from the interrupt acceptance section 21 in the processor section 12.

For interrupt reception, by registering the interrupt cause as is in the processor 21, when the processor sensor unit 22, which was in a state in which interrupt processing was not possible, becomes able to handle the interrupt, the interrupt is processed by the processor. The interrupt processing unit 22 can accept the request and execute interrupt processing.

Here, if an interrupt process that can be executed as an alternative and an interrupt that cannot be executed occur at the same time, the processor unit 12 executes the interrupt process that can be executed as an alternative, and interrupts that cannot be executed as an alternative. That's it! This will be registered in the L/interrupt reception section 21.

Note that when an interrupt from an information processing device corresponding to the faulty processor 1 is input to the interrupt acceptance section 11, if the processor section 12 of the faulty processor 1 is in a state where it cannot process the interrupt, the above-mentioned processing is performed. In the same manner as in the operation, interrupt processing that can be executed instead by the processor section 22 of the failure processing processor 2 is executed.

In this way, when an interrupt from the information processing device corresponding to the failure processing processor 2 is input to the interrupt acceptance section 21, the interrupt acceptance is sent from the interrupt acceptance section 21 to the processor section 2 of the own device.
2 and to issue an interrupt request to the processor unit 12 of another device, and when the processor unit 22 of the own device is in a state where the interrupt cannot be processed, the interrupt is processed by the processor unit 12 of the other device. Therefore, even if the fault processing processor 2 fails, the fault processing for the fault report from the information processing device corresponding to the fault processing processor 2 can be quickly performed by the processor section 12 of another device, and the information processing system configuration change processing can be performed quickly.

As explained above, the present invention is capable of transmitting a fault detection signal from an information processing device corresponding to another device to the own device, and executing fault processing in response to the fault detection signal. When the fault processing processor is determined to be impossible in another device, the fault processing in response to the fault detection signal is executed by the own device, so that even if the fault processing processor fails, the fault processing processor can be handled. This has the advantage that failure processing can be executed in response to a failure report from an information processing device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the invention, and FIG. 2 is a flowchart showing the operation of the embodiment of the invention. Explanation of symbols of main parts 1.2... Failure processing processor 11.21...
...Interrupt reception is done by section 12.22...Processor section

Claims (1)

[Claims] (1) An information processing system including a plurality of information processing devices and a plurality of fault processing processors provided corresponding to each of the plurality of information processing devices, in which a fault occurs from the information processing device corresponding to the own device. A sending means for sending a detection signal to the own device and another device, a fault processing means for processing a fault in response to the fault detection signal, and an identification means for identifying the state of the fault processing means of the other device. Provided in each of the plurality of fault processing processors, the fault detection signal is sent from the sending means of the other device, and the identification means determines that the fault processing in response to the fault detection signal cannot be executed in the other device. 1. An information processing system characterized in that, when a failure occurs, a failure processing means of the own device executes failure processing in response to the failure detection signal.