JPH0286236A - Clock switching circuit - Google Patents

Abstract

PURPOSE:To improve the operability at clock selection changeover by providing a switching circuit to receive a detection signal or an internal clock selection command, thereby selecting an internal clock. CONSTITUTION:When an internal clock 5 is selected by a clock selection setting switch 3, a clock selection command 6 representing the selection of the internal clock is outputted from the clock selection setting switch 3 to a switching circuit 7, which outputs the internal clock 5 externally as an output clock 8. Moreover, the clock selection command 6 is outputted also to a gate circuit 12, which is closed. In the case of selecting the internal clock 5, although the interruption of the external clock 2 is expected, even if a detection signal 10 is outputted from an external clock input interruption detection circuit 9, since it is interrupted by the gate circuit 12, no detection signal 10 is outputted to an alarm device. Thus, only the operation of the clock selection setting switch 3 is enough for the clock selection changeover.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention selects and outputs either an external clock input from the outside or an internal clock generated internally. The present invention relates to a clock switching circuit that selects an internal clock signal when a clock signal is cut off.

[Conventional technology]

Generally, in communication systems, there is a method of configuring a synchronous network. In this method, a reference clock is transmitted to each terminal station, and the terminal stations perform heating control in synchronization with this reference clock. A communication device compatible with this method usually selects an external clock or an internal clock using a clock switching circuit, and is capable of operating based on the selected clock.

FIG. 2 shows a conventional clock switching circuit. Normally, the switching circuit 1 selects the external clock 2. When the clock selection setting switch 3 selects the external clock 2 input from the outside or the internal clock 5 output from the internal clock generation circuit 4, a clock selection instruction 6 indicating the selected clock is switched from the clock selection setting switch 3. The signal is output to the circuit 7, and the switching circuit 7 switches to the predetermined clock side. Thereby, the selected clock can be output as the output clock 8.

Further, when an input interruption of the external clock 20 occurs due to a failure in the transmission system, the external clock input interruption detection circuit 9 detects this and outputs a detection signal 10.

This detection signal 10 is output to an external alarm (not shown) and the switching circuit 1. Upon receiving this detection signal 10, the switching circuit 1 switches to the internal clock 5 side, and the internal clock 5 is output as the output clock 8.

Furthermore, when internal clock 5 is selected,
Since it would be inconvenient if the detection signal 10 is output to an external alarm, the switch 11 outputs the detection signal 10 to the outside.
The output was being cut off.

[Problem to be solved by the invention]

However, in the above-mentioned technique, when changing the clock selection, it is necessary to change the switch 11 as well as the clock selection setting switch 3, which poses a problem in operability.

In particular, when switching from the internal clock 5 to the external clock 2, it is easy to forget to switch the switch 11 because it operates normally even without switching the switch 11. In this case, a situation arises in which the alarm does not operate when the external clock 20 input is cut off.

SUMMARY OF THE INVENTION In view of these problems, it is an object of the present invention to provide a clock switching circuit with excellent operability during clock selection switching.

[Means to solve the problem]

In order to achieve the above object, the present invention provides a clock switching circuit having the following means.

(1) A detection unit that detects an input disconnection of an external clock input from the outside and outputs a detection signal.

(2> Internal clock generation section that generates an internal clock.

(3) Tarock selection instruction input means into which an external clock selection instruction and an internal clock selection instruction are input.

(4) Selectively output either the external clock or the internal clock to the outside, and select the external clock by receiving the external clock selection instruction without receiving the detection signal, and also select the external clock by receiving the external clock selection instruction without receiving the detection signal. A clock switching unit that selects an internal clock by receiving one of the clocks.

(5) A detection signal output blocking unit that blocks output of a detection signal from the detection unit by receiving an internal clock selection instruction.

[Effect]

According to the present invention, when either the external clock selection instruction or the internal clock selection instruction is inputted by the clock selection instruction input means, the clock switching section performs a switching operation and can switch the clock to be output.

When switched to the external clock side, if the input of the external clock occurs, this input I! The detection unit detects fr, and the detection signal from the detection unit is output to the outside, and
A clock switching unit selects the internal clock.

Furthermore, when the switch is made to the internal clock side, the detection signal output transmitter operates upon receiving the internal clock selection instruction and blocks the output of the detection signal from the detection section, so that the detection signal from the detection section is not output to the outside. Never.

〔Example〕

Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 shows a clock switching circuit according to an embodiment of the present invention. The switching circuit 1 selects and outputs either the external clock 2 or the internal clock 5, and normally selects the external clock 2, and selects the internal clock 5 by receiving the detection signal 10. It is something to do. The switching circuit 7 similarly selects either the external clock 2 or the internal clock 5 and outputs it as the output clock 8, and performs the switching operation based on the clock selection instruction 6.

The internal clock generating circuit 4 outputs an internal clock 5. The clock selection setting switch 3 receives a clock selection instruction 6 indicating selection of either an external clock or an internal clock. The external clock input disconnection detection circuit 9 detects input disconnection of the external clock 2,
It outputs a detection signal 10. The gate circuit 12 sends a detection signal 10 to an external alarm and switching circuit 1.
It controls the opening and closing of the output of the clock, and takes an open state in response to a clock selection instruction 6 indicating external clock selection, and takes a closed state in response to a clock selection instruction 6 indicating internal clock selection.

Next, the operation of this clock switching circuit will be explained.

The output clock 8 can be selected by the operator selecting the external clock 2 or the internal clock 5 using the clock selection setting switch 3.

When the external clock 2 is selected, the clock selection instruction 6 indicating external clock selection is set to the clock selection setting switch 3.
is output to the switching circuit 7. Normally, the switching circuit 1 is
The external clock 2 is output to a switching circuit 7, and the switching circuit 7 outputs the external clock 2 as an output clock 8 to the outside.

Here, when an input interruption of the external clock 2 occurs due to a failure in the transmission system, the external clock input interruption detection circuit 9 detects this input interruption and outputs a detection signal 10. The gate circuit 12 is in an open state upon receiving the clock selection instruction 6 indicating external clock selection, and the detection signal 10 is outputted to the external alarm and switching circuit 1. As a result, an alarm is issued by the alarm device, and the switching circuit 1 selects the internal clock 5, so that the internal clock 5 is outputted as the output clock 8.

In addition, the clock selection setting switch 3 selects the internal clock 5.
is selected, the clock selection instruction 6 indicating internal clock selection is sent from the clock selection setting switch 3 to the switching circuit 7.
is output to. Upon receiving this clock selection instruction 6, the switching circuit 7 outputs the internal clock 5 as an output clock 8 to the outside.

Further, the clock selection instruction 6 described above is also output to the gate circuit 12, and upon receiving this clock selection instruction 6, the gate circuit 12 assumes a closed state. When selecting the internal clock 5, it is expected that the external clock 2 is input disconnected, but the detection signal 10 from the external clock input disconnection detection circuit 9 is
Even if the detection signal 10 is outputted, the detection signal 10 is not outputted to the alarm because it is cut off by the gate circuit 12.

As described above, according to the present embodiment, the gate circuit 12 operates based on the clock selection instruction 6 and opens and closes the output of the detection signal 10, so that when switching the clock selection, the operator can
It is sufficient to operate only the clock selection setting switch 3.

〔Effect of the invention〕

As described above, according to the present invention, upon receiving an internal clock selection instruction, the detection signal output blocking means blocks the output of the detection signal from the detection section. All you have to do is operate it and input a predetermined clock selection instruction.

Therefore, there is no need to operate a switch to turn off the detection signal, and there is an advantage that operability is improved.

Furthermore, it is possible to eliminate the situation where the alarm does not operate when the input of the external clock is cut off due to forgetting the switch changeover operation, which has the advantage of improving reliability.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a clock switching circuit according to an embodiment of the present invention, and FIG. 2 is a block diagram showing a conventional clock switching circuit. l...Switching circuit, 2...External clock, 3...Clock selection setting switch, 4...
... Internal clock generation circuit, 5 ... Internal clock, 6 ... Clock selection instruction, 7 ... Switching circuit, 8 ... Output clock, 9 ...External clock input disconnection detection circuit, 10...
...Detection signal, 12...Gate circuit.

Claims (1)

[Scope of Claims] A detection unit that detects an input disconnection of an external clock input from the outside and outputs a detection signal, an internal clock generation unit that generates an internal clock, and an external clock selection instruction and an internal clock selection instruction. Clock selection instruction input means to be input, and a clock that selectively outputs either the external clock or the internal clock to the outside and selects the internal clock by receiving either the detection signal or the internal clock selection instruction. A clock switching circuit comprising: a switching section; and a detection signal output blocking section that blocks output of a detection signal from the detection section upon receiving an internal clock selection instruction.