JPH0284938U - - Google Patents

Info

Publication number
JPH0284938U
JPH0284938U JP16299588U JP16299588U JPH0284938U JP H0284938 U JPH0284938 U JP H0284938U JP 16299588 U JP16299588 U JP 16299588U JP 16299588 U JP16299588 U JP 16299588U JP H0284938 U JPH0284938 U JP H0284938U
Authority
JP
Japan
Prior art keywords
voltage
signal
level
circuit
operating threshold
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16299588U
Other languages
Japanese (ja)
Other versions
JPH0650028Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988162995U priority Critical patent/JPH0650028Y2/en
Publication of JPH0284938U publication Critical patent/JPH0284938U/ja
Application granted granted Critical
Publication of JPH0650028Y2 publication Critical patent/JPH0650028Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は、この考案におけるリセツト回路を有
するタイマーＩＣの一実施例のリセツト回路のブ
ロツク図であり、第２図は、このリセツト回路が
内蔵されたタイマＩＣの内部構成図、第３図は、
リセツト回路の動作を説明するためのグラフ図で
ある。 １……リセツト回路、２……レベル信号発生回
路、３，５，６，７……インバータ、１０……タ
イマＩＣ、１１……発振回路（ＯＳＣ）、１２…
…カウンタ、１３……コントローラ、Ｄ１，Ｄ２
……ダイオード。 FIG. 1 is a block diagram of a reset circuit of one embodiment of a timer IC having a reset circuit according to this invention, FIG. 2 is an internal configuration diagram of a timer IC incorporating this reset circuit, and FIG. ,
FIG. 3 is a graph diagram for explaining the operation of the reset circuit. 1... Reset circuit, 2... Level signal generation circuit, 3, 5, 6, 7... Inverter, 10... Timer IC, 11... Oscillation circuit (OSC), 12...
...Counter, 13...Controller, D1 , D2
 ……diode.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 定常状態で電圧Ｖ０の供給電力を受け、回路動
作開始電圧がＶ１であり、回路が正常に動作する
電圧がＶ２であつて、Ｖ０＞Ｖ１＞Ｖ２の関係に
あるリセツト回路において、前記供給電力の電圧
が所定の電圧Ｖ３（ただしＶ３＜Ｖ２）以上にあ
るときに所定の電圧Ｖ３の信号を発生するレベル
信号発生回路と、このレベル信号発生回路の前記
電圧Ｖ３の信号を受ける、信号反転の動作閾値レ
ベルがＶ４のインバータとを備え、前記動作閾値
レベルＶ４が電源電圧の分圧値として与えられ、
前記供給電力の電圧がＶ２とＶ１との間にあると
きには前記電圧Ｖ３の信号の電圧レベルがＶ４よ
り低い値となり、前記供給電力の電圧がＶ１とＶ
０との間にあるときには前記電圧Ｖ３の信号の電
圧レベルがＶ４より高い値になるように前記動作
閾値レベル電圧Ｖ４と前記電圧Ｖ３とが選択され
ていて、前記インバータの出力をリセツト信号と
して利用することを特徴とするリセツト回路。 A reset circuit that receives power supplied with a voltage of V 0 in a steady state, has a circuit operation start voltage of V 1 , a voltage at which the circuit operates normally is V 2 , and has a relationship of V 0 > V 1 > V 2 . , a level signal generation circuit that generates a signal of a predetermined voltage V 3 when the voltage of the supplied power is equal to or higher than a predetermined voltage V 3 (where V 3 <V 2 ); and the voltage of the level signal generation circuit. an inverter that receives a signal of V 3 and has an operating threshold level of V 4 for signal inversion, the operating threshold level V 4 being given as a divided voltage value of a power supply voltage;
When the voltage of the supplied power is between V2 and V1 , the voltage level of the signal of the voltage V3 is lower than V4 , and the voltage of the supplied power is between V1 and V1 .
0 , the operating threshold level voltage V4 and the voltage V3 are selected so that the voltage level of the signal of the voltage V3 is higher than V4 , and the output of the inverter is A reset circuit characterized in that it is used as a reset signal.
JP1988162995U 1988-12-15 1988-12-15 Reset circuit Expired - Lifetime JPH0650028Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988162995U JPH0650028Y2 (en) 1988-12-15 1988-12-15 Reset circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988162995U JPH0650028Y2 (en) 1988-12-15 1988-12-15 Reset circuit

Publications (2)

Publication Number Publication Date
JPH0284938U true JPH0284938U (en) 1990-07-03
JPH0650028Y2 JPH0650028Y2 (en) 1994-12-14

Family

ID=31447324

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988162995U Expired - Lifetime JPH0650028Y2 (en) 1988-12-15 1988-12-15 Reset circuit

Country Status (1)

Country Link
JP (1) JPH0650028Y2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56108120A (en) * 1980-01-31 1981-08-27 Nec Corp Automatic clearing circuit
JPS5932024A (en) * 1982-08-13 1984-02-21 Hitachi Ltd Semiconductor integrated circuit
JPS59198024A (en) * 1983-04-25 1984-11-09 Mitsubishi Electric Corp Signal generating circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56108120A (en) * 1980-01-31 1981-08-27 Nec Corp Automatic clearing circuit
JPS5932024A (en) * 1982-08-13 1984-02-21 Hitachi Ltd Semiconductor integrated circuit
JPS59198024A (en) * 1983-04-25 1984-11-09 Mitsubishi Electric Corp Signal generating circuit

Also Published As

Publication number Publication date
JPH0650028Y2 (en) 1994-12-14

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