JPH028328B2 - - Google Patents
Info
- Publication number
- JPH028328B2 JPH028328B2 JP58059585A JP5958583A JPH028328B2 JP H028328 B2 JPH028328 B2 JP H028328B2 JP 58059585 A JP58059585 A JP 58059585A JP 5958583 A JP5958583 A JP 5958583A JP H028328 B2 JPH028328 B2 JP H028328B2
- Authority
- JP
- Japan
- Prior art keywords
- carry
- final
- bits
- partial product
- adder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/523—Multiplying only
- G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
- G06F7/5318—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel with column wise addition of partial products, e.g. using Wallace tree, Dadda counters
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58059585A JPS59184945A (ja) | 1983-04-04 | 1983-04-04 | パイプライン化乗算回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58059585A JPS59184945A (ja) | 1983-04-04 | 1983-04-04 | パイプライン化乗算回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59184945A JPS59184945A (ja) | 1984-10-20 |
| JPH028328B2 true JPH028328B2 (https=) | 1990-02-23 |
Family
ID=13117448
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58059585A Granted JPS59184945A (ja) | 1983-04-04 | 1983-04-04 | パイプライン化乗算回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59184945A (https=) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4958312A (en) * | 1987-11-09 | 1990-09-18 | Lsi Logic Corporation | Digital multiplier circuit and a digital multiplier-accumulator circuit which preloads and accumulates subresults |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS588353A (ja) * | 1981-07-06 | 1983-01-18 | Nec Corp | 乗算装置 |
-
1983
- 1983-04-04 JP JP58059585A patent/JPS59184945A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59184945A (ja) | 1984-10-20 |
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