JPH0277709U - - Google Patents
Info
- Publication number
- JPH0277709U JPH0277709U JP15750088U JP15750088U JPH0277709U JP H0277709 U JPH0277709 U JP H0277709U JP 15750088 U JP15750088 U JP 15750088U JP 15750088 U JP15750088 U JP 15750088U JP H0277709 U JPH0277709 U JP H0277709U
- Authority
- JP
- Japan
- Prior art keywords
- setting
- timer
- delay time
- digital value
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 5
- 238000010606 normalization Methods 0.000 description 1
Landscapes
- Programmable Controllers (AREA)
Description
第１図は本考案に係わるプログラマブルコント
ローラの実施例を示すブロツク図、第２図及び第
３図はタイマの遅延動作を示すラダー図、第４図
ないし第６図は従来例を示し、第４図は回路図、
第５図はラダー図、第６図はタイミング図である
。
１ａ，１ｂ，１ｃ……トリマ、２……マルチプ
レクサ、３……Ａ／Ｄ変換器、４……正規化。
FIG. 1 is a block diagram showing an embodiment of the programmable controller according to the present invention, FIGS. 2 and 3 are ladder diagrams showing the delay operation of a timer, FIGS. 4 to 6 show a conventional example, and FIGS. The figure is a circuit diagram,
FIG. 5 is a ladder diagram, and FIG. 6 is a timing diagram. 1a, 1b, 1c...trimmer, 2...multiplexer, 3...A/D converter, 4...normalization.
Claims (1)
力後のタイマ出力の遅延時間を設定するものであ
つて、 前記タイマの遅延時間をアナログ値で設定する設
定手段と、該アナログ値をデジタル値に変換する
変換手段と、該デジタル値を所定のフルスケール
内で正規化する正規化手段とを備え、該正規化さ
れたデジタル値がタイマの遅延時間として設定さ
れることを特徴とするプログラマブルコントロー
ラ。[Claims for Utility Model Registration] A programmable controller for setting a delay time of a timer output after a contact input, comprising: a setting means for setting the delay time of the timer using an analog value; and a setting means for setting the delay time of the timer using an analog value; A programmable controller comprising a converting means for converting the digital value into a digital value and a normalizing means for normalizing the digital value within a predetermined full scale, the normalized digital value being set as a timer delay time. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15750088U JPH0277709U (en) | 1988-12-01 | 1988-12-01 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15750088U JPH0277709U (en) | 1988-12-01 | 1988-12-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0277709U true JPH0277709U (en) | 1990-06-14 |
Family
ID=31437000
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15750088U Pending JPH0277709U (en) | 1988-12-01 | 1988-12-01 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0277709U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2014102895A1 (en) * | 2012-12-25 | 2017-01-12 | 三菱電機株式会社 | Positioning device and positioning method |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53136180A (en) * | 1977-04-30 | 1978-11-28 | Toshiba Corp | Controller |
| JPS59139405A (en) * | 1983-01-28 | 1984-08-10 | Omron Tateisi Electronics Co | Timer/counter setting device of programmable controller |
-
1988
- 1988-12-01 JP JP15750088U patent/JPH0277709U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS53136180A (en) * | 1977-04-30 | 1978-11-28 | Toshiba Corp | Controller |
| JPS59139405A (en) * | 1983-01-28 | 1984-08-10 | Omron Tateisi Electronics Co | Timer/counter setting device of programmable controller |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2014102895A1 (en) * | 2012-12-25 | 2017-01-12 | 三菱電機株式会社 | Positioning device and positioning method |