JPH027746A - Phase error detector - Google Patents

Abstract

PURPOSE:To simplify a circuit constitution by providing a 1st demodulation means detecting the in-phase component of an n-phase modulation wave and other input signal, a 2nd demodulation means detecting the orthogonal component of the n-phase modulation wave and other input signal and a means applying n's power to a complex number vector. CONSTITUTION:A reception signal (n-phase modulation wave) is inputted to an input terminal 1, a reference carrier is inputted from an input terminal 2 and in-phase and orthogonal components of reception signals are outputted respectively from demodulators 4, 5. The output of the demodulators 4, 5 is squared as a complex number vector in a 1st vector multiplier 61 in which the output of the demodulator 4 is used as a real part and an output of the demodulator 5 is used as an imaginary part, and the output of the (k-1)th vector multiplier 6(k-1) and outputs of the demodulators 4, 5 are multiplied in the k-th vector multiplier 6k. Thus, the output of the demodulators 4, 5 is subjected to n's power calculation by n-set of vector multipliers 61-6n as complex number vectors and a phase error multiplied by a factor of (n) is obtained. Thus, the phase error is detected without needing any complicated circuit such as an expected value detector.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a phase error detection device used in demodulating a polyphase modulated wave.

(Prior Art) When demodulating a phase modulated wave, a reference carrier wave synchronized with a carrier wave of a received signal is required. To obtain a synchronized reference carrier, a phase error between the carrier of the received signal and the reference carrier is detected, and the phase of the reference carrier is controlled based on the detected phase error. For this purpose, a phase error detection device is used.

FIG. 4 shows a schematic block diagram of an example of a conventional phase error detection device. When an n-phase phase modulated wave is input to the input terminal 41, this input signal is split into two, one being directly given to the first demodulator 44, and the other being given via the π/2 phase shifter 43. A second demodulator 45 is provided. The reference carrier wave input to the terminal 42 is split into two and given to the first and second demodulators 44 and 45.

In the first and second demodulators 44 and 45, the in-phase and quadrature components of the input signal are respectively detected and output, and these outputs are input to an expected value detector 46 for obtaining an expected value. In the vector multiplier 48.

The complex vector obtained by the complex conjugate converter 47 which obtains the conjugate value of the complex vector output from the expected value detector 46 is multiplied by the output of the demodulators 44 and 45.

In the phase miscalculation detection device described above, the first and second demodulators 44 when an n-phase phase modulated wave input signal is given.
When the output of 45 is expressed as a complex vector, the 9th order equation (1)
becomes.

x (k) =exp (j ((2z/n)k+φ,
(k) ) :l ・(1) However, in formula 2 (1),
is an integer, φ. is the phase error.

Further, the output of the expected value detector 46 is expressed by Equation 9 (2).

Z(k) = det(x(k)) =exp
(j(2π/n)k) −(2) where rdet J represents an operation to obtain an expected value. Therefore, the complex conjugate transformer 4
The output of 7 is.

conj (Z (k)) =exp (-j(2
π/n)k) (3). Here rconj J
is an abbreviation for "r conjugate" and represents a conjugate complex number. Therefore, output terminal 49.5
If we express the output that appears at 0 as a complex vector.

ψm =x (k) Xconj (Z (k))=
exp (j ((2π/n)k+φ, (k)))X
exp (-j, (2π/n)k)=exp (jφ.

(k)) ...(4), and a two-phase error exp (jφ.(k)) is obtained.

(Problems to be Solved by the Invention) The conventional phase error detection device described above requires the expected value detector 46, which is a heavy burden in terms of hardware or software, so the nine circuit configuration is quite complicated. , it had to be expensive.

Therefore, two objects of the present invention are to provide a phase error detection device that can detect a phase error with a simpler circuit configuration when demodulating a multiphase phase modulated wave.

(Means for Solving the Problems) The phase error detection device of the present invention includes a first demodulation means for detecting an in-phase component between an n-phase phase modulated wave and another input signal, and a first demodulation means for detecting an in-phase component between the n-phase phase modulated wave and the other input signal. and a vector multiplier for multiplying a complex vector constituted by the in-phase component and the orthogonal component to the nth power, thereby achieving the above object. Ru.

(Example) The present invention will be described below with reference to Examples.

FIG. 1 shows a schematic block diagram of an embodiment of the present invention. This embodiment is a phase error detection device that detects a phase error during demodulation of an n-phase phase modulated wave. The received signal (i.e., n-phase phase modulated wave) input to the input terminal 1 is split into two branches, one of which is directly input to the first demodulator 4, and the other is input to the π/
The signal is input to the second demodulator 5 via the 2 phase shifter 3. 1st
and also to demodulator 4.5 in FIG. A reference carrier wave is input from input terminal 2. Therefore, the first and second demodulators 4.5 output in-phase and quadrature components of the received signal, respectively. After the demodulator 4.5, there are n vector multipliers 6.5 corresponding to the number of phases. ~6. l is connected. In the first vector multiplier 6I, the outputs of the demodulators 4 and 5 are squared as a complex vector with the output of the demodulator 4 as the real part and the output of the demodulator 5 as the imaginary part. kth (k=2....+
n) vector multiplier 6, on the output of the (k-1)th vector multiplier 6<hu.

The outputs of demodulators 4 and 5 are multiplied. Therefore, the output of the demodulator 4.5 is raised to the nth power as a complex vector by the n vector multipliers 61 to 67, and the real and imaginary parts of the result are outputted to the output terminals 7.8, respectively.

1. When an n-phase phase modulated wave input signal is input to input terminal 1. The outputs of the second demodulators 4 and 5 are expressed as complex vectors.

X (k) = exp [j ((2π/n)
k + φ, (k)) (5). Formula (5
), φ, is the phase error with 1φ,l < π/n, and is an integer.

Vector multiplier 6. The multiplication result by ~6 is the 9th order equation (
6).

φ(k) = [exp j ((2z/n)k+φ,
(k))]'””eXp[j [10 nφ in 2π, (k)
)]=exp (jnφ, (k)) ...(
6) As shown above, vector multiplier 6. .about.67, it is possible to obtain the phase error n·φ, (k) multiplied by n.

FIG. 2 shows a schematic block diagram of a carrier wave phase control device for demodulating an 8-phase phase modulated wave as another embodiment.

A phase modulated wave input signal is applied to input terminal 21 .

This input signal is split into two, one of which is input to the first demodulator 24 and the other input to the second demodulator 25 via the π/2 phase shifter 23. Further, the reference carrier wave oscillated by the voltage controlled oscillator (VCO) 29 is transmitted to the first and second demodulators 24 .
25.

Vector multipliers 261 to 263 are connected after the first and second demodulators 24.25. In the device shown in FIG. 2, vector multipliers 26□ and 263 are respectively replaced by vector multipliers 261. And the output of 26□ is 2
connected to ride. Therefore.

Demodulator 24 by three vector multipliers 26, ~263
The output of °25 is raised to the 8th power as a complex vector.

The real part and imaginary part of the multiplication result are output to output terminals 30 and 31, respectively. The comparator 27 outputs a binary digital signal depending on whether the signal input to the output terminal 31 is positive or negative. Comparator 27 and low-pass filter 28 allow VCO2
A phase control signal is supplied to VCO 9, and the phase of VCO 29 is controlled based on this phase control signal.

In the apparatus of FIG. 2, the first and second demodulators 24, 2
Expressing the output of 5 as a complex vector.

x (k) = exp [j ((2π/n)
k+φ, (k)) ]−(7) However, φ. is 1φ
. The phase error is π/8.

Since the vector multipliers 26 and 263 constitute a multiplier that raises x(k) to the 8th power, the output of the vector multiplier 263 is.

φ(k) = [exp j ((2π/n) k+φ
, (k))]”=exp (j8φ.(k))
...(8). Here, φ, (k) <
Because it is π/8.

8・φ. (k)<π. Therefore, vector multiplier 2
6. Of the outputs, sinφ is output to the output terminal 31.

If we pay attention to (k), it is possible to judge the phase lead/lag using only this code.

Note that each of the vector multipliers 6I to 6□26. ~26
Regarding ゜, an appropriate circuit configuration can be used, but
An example of this is shown in FIG. This vector multiplier 300 comprises 2 multipliers 301, 302, 303 and 304 and amplifiers 305, 306. Input terminal 307.30
8 and the signal input to the first input section with input terminal 3
The signals input to the second input section having 09 and 310 are multiplied as a complex vector, and the real part and imaginary part of the 9 multiplication result are outputted to output terminals 311 and 312, respectively. To explain the vector multiplier 61, the output of the demodulator 4 is input to input terminals 307 and 310 as the real part of a complex vector.
The output of the demodulator 5 is input to the input terminal 30 as the imaginary part.
8 and 309.

The vector multiplier used in the above embodiment is:

It can be constructed with a relatively simple circuit as shown in FIG. Therefore, it can be seen that the circuit configuration of the two-phase error detection device can be dramatically simplified since there is no need to provide the complicated expected value detector 46 as in the conventional example.

(Effects of the Invention) As described above, according to the present invention, when demodulating a polyphase phase modulated wave, a complicated hardware or software circuit such as an expected value detector in a conventional phase error detection device is not required. There is provided a phase error detection device that can detect a phase error with a simple circuit configuration that does not require a simple circuit configuration.

Ikko once "Kuchi 1" CL curse FIG. 1 is a schematic block diagram of an embodiment of the present invention.

FIG. 2 is a schematic block diagram showing a carrier phase control device for demodulating eight-phase modulated waves, which is another embodiment of the present invention, and FIG. 3 is a circuit diagram of an example of a vector multiplier.

FIG. 4 is a schematic block diagram of an example of a conventional phase error detection device.

4...first demodulator, 5...second demodulator, 6. ~
6fi vector multiplier.

that's all

Claims (1)

[Claims] 1. A first demodulating means for detecting an in-phase component between the n-phase phase modulated wave and another input signal; a second demodulating means for detecting an orthogonal component between the n-phase phase modulated wave and the other input signal; and a phase error detection device comprising vector multiplication means for multiplying a complex vector constituted by the in-phase component and the orthogonal component to the nth power.