JPH0270444U - - Google Patents

Info

Publication number
JPH0270444U
JPH0270444U JP15026688U JP15026688U JPH0270444U JP H0270444 U JPH0270444 U JP H0270444U JP 15026688 U JP15026688 U JP 15026688U JP 15026688 U JP15026688 U JP 15026688U JP H0270444 U JPH0270444 U JP H0270444U
Authority
JP
Japan
Prior art keywords
wiring
semiconductor
stress absorbing
semiconductor device
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15026688U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15026688U priority Critical patent/JPH0270444U/ja
Publication of JPH0270444U publication Critical patent/JPH0270444U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示す断面図、第2
図は従来の半導体装置のAl配線部分を示す断面
図である。 1……Si基板、2……SiO層、3……A
l配線、4,4′……Si層、10……ス
トレス吸収部。
Fig. 1 is a sectional view showing one embodiment of the present invention;
The figure is a cross-sectional view showing an Al wiring portion of a conventional semiconductor device. 1...Si substrate, 2...SiO 2 layer, 3...A
1 wiring, 4, 4'... 4 Si 3 N layers, 10... stress absorption section.

Claims (1)

【実用新案登録請求の範囲】 (1) 半導体基板の一主面に形成された半導体素
子にAl配線を接続してなる半導体装置に於いて
、 半導体素子が形成された半導体基板と、 この半導体基板上に絶縁膜を介して形成され上
記半導体素子に接続されるAl配線と、 このAl配線上に所定の間隔をおいて上記Al
配線と交差する方向に形成された複数の応力吸収
部と、 この応力吸収部上に形成された表面保護膜と、 を備えたことを特徴とする半導体装置。 (2) 上記応力吸収部と上記表面保護膜部とは同
一材料とからなることを特徴とする請求項第1項
記載の半導体装置。
[Scope of Claim for Utility Model Registration] (1) In a semiconductor device in which Al wiring is connected to a semiconductor element formed on one principal surface of a semiconductor substrate, a semiconductor substrate on which a semiconductor element is formed, and this semiconductor substrate. an Al wiring formed on the top via an insulating film and connected to the semiconductor element, and an Al wiring placed at a predetermined interval on the Al wiring
What is claimed is: 1. A semiconductor device comprising: a plurality of stress absorbing portions formed in a direction intersecting wiring; and a surface protection film formed on the stress absorbing portions. (2) The semiconductor device according to claim 1, wherein the stress absorbing portion and the surface protection film portion are made of the same material.
JP15026688U 1988-11-17 1988-11-17 Pending JPH0270444U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15026688U JPH0270444U (en) 1988-11-17 1988-11-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15026688U JPH0270444U (en) 1988-11-17 1988-11-17

Publications (1)

Publication Number Publication Date
JPH0270444U true JPH0270444U (en) 1990-05-29

Family

ID=31423257

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15026688U Pending JPH0270444U (en) 1988-11-17 1988-11-17

Country Status (1)

Country Link
JP (1) JPH0270444U (en)

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