JPH0268935A - Semiconductor device - Google Patents

Abstract

PURPOSE:To acquire a fast bipolar transistor having high hFE by interposing a silicon layer containing arsenic of at least a specific amount between an emitter region consisting of dissimilar semiconductor and a base region of silicon. CONSTITUTION:In a transistor having a dissimilar semiconductor 5 on a surface of a single crystalline silicon 4 as an emitter which forms a junction with the single crystalline silicon 4, a silicon layer 8 containing arsenic of at least 5% is interposed between the single crystalline silicon 4 and the dissimilar semiconductor layer 5. For example, an n<+> collector buries layer 2, an n collector layer 3 and a p-base layer 4 are formed on a p-type silicon substrate 1, and an SiAs layer 8 is formed thereon. As for the formation method, plasma CVD using SiH4 or Si2H6 and AsH3, etc., or a usual CVD method is applied and a thickness of the SiAs layer 8 is made approximately 100Angstrom . An Si(1-x)Cx layer which is doped with As or P is formed through plasma CVD method as a wide gap emitter material 5.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a transistor structure in which one of the constituent materials is a material having a wider band gap than single crystal silicon. The present invention relates to a transistor having, as an emitter, a different type of semiconductor that forms a junction with the single crystal silicon on the surface of silicon.

[Conventional technology]

If a material with a wider bandgap than silicon is used as the emitter material of a 7-licocombinolar transistor (wide gap emitter), the emitter injection efficiency can be increased and high hFl can be expected even when the impurity concentration in the base layer is high. .

When the impurity concentration of the base layer is high, the width of the base layer can be narrowed to shorten the base travel time, and furthermore, the base resistance can be lowered, so it is expected that the speed of the bipolar transistor will be increased.

By the way, in such a bipolar transistor, crystalline Ga is used as a wide bandgap heterojunction material with silicon.
As, crystal GaP, single crystal SiC, etc. are being considered.

[Problem to be solved by the invention]

However, since these single-crystal materials have fixed lattice constants, when they are formed on single-crystal silicon, the density of interface states due to mismatch with the lattice constant of single-crystal silicon increases, resulting in interface regeneration. The drawback is that the coupling current is large, high, and cannot be expected. Other heterojunction materials such as oxygen-doped polycrystalline 5t (SIPO8) and microcrystalline silicon have also been tried. These materials have lower interface state densities than crystalline heteromaterials, but this is still not sufficient. Furthermore, the resistance is high, which hinders the speeding up of transistors.

Additionally, microcrystalline silicon has a problem of low heat resistance.

In view of the above points, the present invention was developed to solve these problems.The purpose of the present invention is to reduce the interface states of the heterojunction with silicon, and to reduce the resistance of the constituent films. The object of the present invention is to provide a high-speed bipolar transistor having a high h□ by using a substance whose forbidden band width can be controlled over a wide range as an emitter material and by using a thin base layer doped with impurities at a high concentration.

[Ninth means to solve the problem]

To achieve the above object, the present invention provides a novel material, silicon containing 5% or more of arsenic, between an emitter region having a wider bandgap than silicon and a silicon paste region in a Peter junction transistor. The presence of a thin layer is used as fjr:%.

[Effect]

Therefore, in the present invention, silicon containing 5% or more of arsenic has the effect of suppressing the generation of Peter interface states. Therefore, there is a high degree of freedom in selecting the type of emitter material that has a wider forbidden band width than silicon. Furthermore, it has better thermal stability than silicon containing a high concentration of hydrogen, which has been reported to be effective in suppressing interface states.

〔Example〕

Hereinafter, the present invention will be described in detail based on embodiments shown in the drawings.

FIG. 1 is a cross-sectional structural diagram of a hetero bipolar transistor according to an embodiment of the present invention.
pn) An example is shown in which the emitter structure is based on a transistor. In the figure, 1 is a p-type silicon substrate, 2
is n+ collector buried layer, 3 is n collector layer, 4 is p
The base layer, 5, is a wide gap emitter material. In addition, 6 is a collector, paste, and emitter electrode made of metal such as At or polycrystalline silicon, and γ is 5t.
An isolation insulator such as O1, and 8 a silicon layer (hereinafter referred to as 5iAs) containing 5% or more of arsenic (As).

A specific example of the method for manufacturing this transistor will be described below. In FIG. 1, the method of forming the parts 1.2, 3.degree. 4.6, and T is not particularly different from conventional known methods. However, the p-type base layer 4 has a higher impurity concentration than that of a normal bipolar transistor, and in this embodiment, it is 1,5XIQ atom/1Y
Boron (B) of n2 to lXl0 at m/z2 was added by ion implantation, and the paste layer thickness was 1.
It was 000X. This corresponds to an average impurity concentration of pace of 1.5×1018 to 1×1020/crn5.

Next, a SiAs layer 8 was formed. As a method for forming this, plasma CVD using SiH4 or Si, H, ASH3, or the like, or a normal CVD method, etc. can be used. The thickness of the 5iAs layer 8 was set to 100X, for example. Further, as the wide gear tube emitter material 5, a 5t(1-X)Cx layer doped with A8 or P was formed by plasma CVD. Its thickness is, for example, 0.2 μm
I took it. Next, remove unnecessary parts other than the emitter opening with C.
The film is removed by dry etching using F4-01 plasma, and an electrode 6 made of aluminum is formed by a known method to obtain a bipolar transistor having a SiA+ layer 8 at the heterojunction as shown in FIG.

Here, FIG. 2 shows the relationship between the flow rate ratio of Si, H, and AsH and the arsenic (A8) content in the film when 5iAs is formed by the CVD method.

Further, as a preliminary step to show the effects of the present invention, firstly, only SiA+s was deposited to a thickness of 0.2 μm without using a wide gap emitter material, and the effect of arsenic in this case is shown in FIG. 3. In this figure, the horizontal axis shows the amount of poron injected into the pace, the vertical axis shows the current amplification factor hFE of the transistor, and the arsenic content (As = 2% or less, 5%, 10%).

20%) as a total harameter, and the following shows the pace concentration dependence of the transistor. Arsenic concentration in this experiment range is 2%
In the above case, the carrier concentration of the emitter hardly changes, but rather decreases slightly as the arsenic concentration increases. However, as can be seen from FIG. 3, the higher the arsenic content, the higher hy+c at low paste concentrations. This is because arsenic at the hetero-interface binds with dangling bonds of silicon or carbon in a three-coordinate manner, thereby inactivating the interface level.

However, at high pace concentrations, there is no dependence of h□ on arsenic concentration. This indicates that since silicon arsenide does not have a wide gap effect, the emitter injection efficiency decreases as the paste concentration increases.

Next, after forming 100 layers of 5IAs with an arsenic content of 2%, a wide gap emitter material 5 of 0.
Figure 4 shows hFIc as a function of pace concentration when a 2 μm 81(1-x)Cx layer is formed and its carbon concentration X (C=O%, 3%, 7%, 15%) is varied. show. As can be seen from FIG. 4, when the carbon concentration increases and the gap becomes sufficiently wide, h□ decreases little even if the pace concentration increases. However, due to the influence of interface states, the increase in h□ due to an increase in carbon concentration reaches a plateau, and LSI
Unable to obtain required values for configuration.

Next, as a demonstration of the effects of the present invention, the carbon concentration of the wide gap emitter material 811-xCX is set to 7x, and the arsenic content (As = 2% or less) of the 5IAs layer remains 100x thick. 5%, 10%.

Figure 5 shows the dependence of hFIc on pace concentration when the concentration of hFIc was increased by 20%. As you can see from this Figure 5, 5i
When the arsenic concentration of As exceeds 5%, the influence of the interface state decreases, and hFl increases to obtain a value of 50 to 100, which is a value required for LSI configuration. Conventionally, a silicon layer containing a large amount of hydrogen was used to eliminate the influence of interface states, but in such cases, heat treatment at 400 degrees Celsius or higher reduces hydrogen and causes deterioration of characteristics. However, in the structure in which the interface states are inactivated by 5iAa of the present invention, the characteristics do not deteriorate up to about 900° C., at which As diffusion becomes significant.

Next, when 5iAs is formed by the CVD method, if the arsenic concentration exceeds 40%, 1' will occur in the 5iAs film, making precise film thickness control difficult. For this reason,
Practically speaking, the arsenic concentration will be 40% or less.

On the other hand, a method of adding As to conventionally reported emitter materials has also been reported. However, in previous reports, the arsenic concentration is at most 1-2%.

In the present invention, by interposing a silicon layer doped with 5% or more arsenic between the wide gap emitter material 5 and the base layer 5 on the silicon substrate, the heterointerface characteristics are significantly improved, which is different from the conventional technology. are completely different. That is, S i according to the present invention is used as the emitter material.
When the As material structure is applied to the emitter, it is possible to obtain a hetero-bipolar transistor that has a high hrz at a high concentration pace, can have a high current density, and operates at high speed.

In addition, in this example! The thickness of the 31As layer was set at 1001, but this value should be smaller as long as the deposition reproducibility of 5IAs can be ensured. However, it goes without saying that the effects of the present invention can be obtained as long as the thickness is equal to or less than the diffusion length of minority carriers in 5iAB. In addition to 5ICx, hydrogenated amorphous 3 is also used as a wide gap emitter material.
i, Hydrogenated microcrystal 81° Of course, the same effect can be obtained by using microcrystals containing oxygen or nitrogen, or amorphous Sl.

〔Effect of the invention〕

As described above, the present invention can reduce the recombination current at the hetero interface in a hetero bipolar transistor in which the emitter is a semiconductor with a wide forbidden band width. As a result, in a bipolar transistor, the base layer impurity concentration can be increased and the base layer can be made thinner while maintaining a high current amplification factor, so that the transistor can be made faster.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional structural diagram of a bipolar transistor having a heterojunction according to an embodiment of the present invention, and FIG.
, a diagram showing the relationship between AsH3 flow rate ratio and arsenic content, 3rd
The figure shows the pace concentration dependence of the current amplification factor of a transistor when only 5IAs is used as an emitter and its arsenic FIG. 5 is a diagram showing the pace concentration dependence of the current amplification factor of a transistor when the carbon concentration of the materials Si, Cx is changed. -5i with the carbon concentration of Cx being 5%
FIG. 3 is a diagram showing the entire base concentration dependence of the current amplification factor of the transistor when the arsenic concentration of the As layer is changed. 1φ...-p type silicon substrate, 2・ψ...n+ collector buried layer, 4...P space layer, 5...wide gap emitter material, 6...electrode, 7... Isolation insulator, 8...5tAs layer. Patent applicant Nippon Telegraph and Telephone Corporation

Claims (1)

[Claims] In a transistor having, as an emitter, a foreign semiconductor forming a junction with the single crystal silicon on the surface of single crystal silicon, a silicon layer containing 5% or more of arsenic is interposed between the single crystal silicon and the foreign semiconductor layer. A semiconductor device characterized by: