JPH0262963B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a signal phase shifting circuit which divides a high frequency original signal using a counter and uses it as a phase reference signal of a phase synchronized circuit or the like.

Assuming that Fig. 1A is a normal phase reference signal, for example, as shown in Fig. 1B, the phase can be advanced or delayed by t ₁ , t ₂ , and t ₃ at points P, Q, and R, respectively. The reference signal may be changed. FIG. 2 shows a conventional reference signal generation circuit, in which a reference signal 3 is obtained by dividing the output of an original signal oscillator 1 by a counter 2, and the phase shift is performed by sending a reset signal to a reset terminal 4 of the counter 2. By applying , the phase of the reference signal 3 can be shifted. This situation is shown in FIG. If the reset signal is not applied, the counter 2 output will be a,
Equally spaced signals b, d... are obtained, and from b to time t ₄
Suppose that the reset signal is applied after the elapse of d, the signal to be generated at d was previously generated at time c, and from then on, the signal _e ,
A signal f... is generated. In this case, the phase of the counter 2 output changes at time c, but d
What determines the time of →c is time _t4 , and the time between c and d is determined by giving the time from b, not directly between c and d. Therefore, the time at which the reset signal is applied is limited, and it is not possible to perform a necessary amount of phase shift at any desired point in time. That is, when performing a phase shift corresponding to between c and d, calculate time t ₄ and change from b to time t ₄
after which the reset signal must be applied;
If the amount of phase shift is small, sufficient accuracy cannot be achieved. Furthermore, since the configuration is such that the counter 2 is simply reset, the phase cannot be delayed.

In this way, with conventional phase shift circuits, there is no degree of freedom in setting the phase shift time, and the phase cannot be delayed.
Another drawback is that precise phase shifting cannot be performed arbitrarily.

The present invention has been made in view of the above-mentioned drawbacks of the conventional art.
This will be explained based on FIG.

In Figure 4, the original signal 1' of the original signal oscillator 1 output
is applied to one contact X of the switch 5, and the original signal 1' is applied to the other contact Y of the switch 5.
The signal is inputted via the first counter 6 as a frequency converter. The output of the switch 5 that selectively outputs the input input to the contact X and the contact Y is
It is output as the phase reference signal 3 via the second counter 7.

Usually, the switch 5 is connected to the contact Y side, and the output of the first counter 6 is connected to the second counter 7.
The first and second counters 6 and 7 are connected in series to obtain the necessary frequency division ratio. Here, the frequency division ratio of the first counter 6 is set to 1/2, and the frequency division ratio of the second counter 7 is set to 1/2.
The operation when the frequency division ratio is set to 2/N will be explained using FIG.

When the switch 5 is connected to the contact Y side, the frequency division ratio is 1/2 x 2/N = 1/N, and the output of the second counter 7 has N values from g shown in Fig. 5D. At time h after the original signal 1' of is counted, the reference signal 3
occurs. Furthermore, when the switch 5 is switched to the contact X side for a period t ₅ between g and h, as shown in FIG. If a frequency twice that of is input and the contact is connected to the Y side during period _t5 , a total of four signals n, n+1, and n+3 shown in FIG. 5A are input to the second counter 7. Since a total of seven signals m, m+1...m+6 shown in FIG. 5B are input to the second counter 7, by switching the switch 5 to the contact X side for a period _t5 , The second counter 7 counts three additional signals during the period t ₅ compared to the case where the contact Y side is also connected, and as a result, the output of the second counter 7 is as shown in FIG. A signal is generated at time point i, which is six times the original signal 1' before h. That is, the phase is advanced by 3/N compared to the normal case where the switch 5 is continuously connected to the contact Y side during the period _t5 .

As is clear from this explanation, switching from the contact Y side to the contact X side of the switch 5 can be done at any time between g and i, and the switching period
The amount of phase shift can be determined using only t ₅ . Therefore, the amount of phase shift can be given directly and accurately.

In the above embodiment, the frequency division ratio of the first counter 6 is set to 1/2, but this frequency division ratio can be set arbitrarily.

In addition, as a second embodiment, a frequency multiplier is interposed between the contact Y and the original signal oscillator 1 instead of the first counter 6, so that the switch 5 is connected to the contact
A similar effect can be obtained by connecting it to the contact Y side and connecting it to the contact Y side for the period _t5 required for phase shift at any time. In this case, the frequency division ratio of the second counter 7 may be set to 1/N.

Furthermore, in the first and second embodiments, the contact point
It can be easily inferred from the above explanation that if the connection state to the Y side and the contact Y side is switched, only a smaller number of signals than the number of signals that should originally be counted will be supplied during the period _t5 . Therefore, in this case, a signal is generated at the output of the second counter 7 at a time later than the time h, and the phase can also be delayed.

FIG. 6 shows the third embodiment of FIG. 4, in which a second frequency converter is installed between the original signal oscillator 1 and the contact X of the switch 5, which has a different frequency division ratio from the first counter 6. A similar effect can also be obtained by temporarily switching the signal supplied to the counting input of the second counter 7 using the switch 5.

Although the third counter 8 is used as the second frequency converter in the embodiment shown in FIG. 6, it is also possible to use a multiplier as the second frequency converter. It is also possible to use multipliers with different multipliers instead of 6 and 8.

FIG. 7 shows another embodiment, in which 1a and 1b are first and second original signal oscillators with different oscillation frequencies, and the first or second original signal oscillator is connected to the count input of the counter 7 by a switch 5. The outputs of the signal oscillators 1a and 1b are selectively supplied, and the switch 5 is temporarily switched to the other for a predetermined period depending on the amount of phase shift required.

FIG. 8 shows an embodiment that can obtain the stability of operation of the embodiment of FIG. is applied to one input 10, and the phase shift control signal G is input to the other input 11 as shown in FIG. 9A. Here, assuming that the signal to input 1 is a signal with a period shown in FIG. 11B, the control circuit 9 temporarily turns on switch ₅ for the period t5 shown in FIG. 9C in response to the phase shift control signal G. It acts to switch. Therefore, the switching timing of the switch 5 is always synchronized with the original signal 1', thereby eliminating unstable operation. Also, input the period t ₅ as
If obtained by counting the signal shown in FIG. 9B applied to 0, the phase shift amount can be obtained at a timing synchronized with the original signal 1', and the accuracy and stability depend on the variation of the phase shift control signal G. no longer depends on This is the same in the embodiment shown in FIG. 6, and in the embodiment shown in FIG. 7, the same effect can be obtained by switching the switch 5 in synchronization with the output of the oscillator 1a or 1b.

In the embodiment, the phase shift is carried out by either advancing or delaying, but it is possible to selectively shift the phase by advancing or delaying by means such as providing three contacts for supplying the signal to the counting input of the counter 7. It is possible to create a phase shift circuit that can do this. Furthermore, since a change in phase occurs each time it is applied, it goes without saying that it can be applied any number of times at any given time. Furthermore, a logic gate may be used as the switching means.

As explained above, according to the present invention, in a circuit that obtains a reference signal by frequency-dividing an original signal, by temporarily increasing or decreasing the signal to the count input of the counter at an arbitrary time, the output signal is It is possible to shift the phase by an arbitrary amount, and the degree of freedom in setting the phase shift time is increased, and precise phase shifting can be carried out arbitrarily.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of the phase shift of a reference signal, FIG. 2 is a configuration diagram of a conventional signal generation circuit, FIG. 3 is a timing diagram of FIG. 2, and FIGS. 4 to 9 show embodiments of the present invention. , Fig. 4 is a configuration diagram of the signal generation circuit, and Fig. 5 is the signal generation circuit configuration diagram.
FIG. 6 is a configuration diagram of another embodiment shown in FIG. 4, FIG. 7 is a configuration diagram of another embodiment, FIG. 8 is a configuration diagram of another embodiment shown in FIG. FIG. 9 is a timing diagram of FIG. 1, 1a, 1b...original signal oscillator, 1'...original signal,
3...Reference signal, 5...Switch [switching means], 6...
First counter [first frequency converter], 7... second counter [counter], 8... third counter [second frequency converter], 9... control circuit.

Claims (1)

[Claims] 1. A signal generation circuit that divides the frequency of an original signal by a counter to obtain a reference signal, which includes an oscillator that outputs the original signal, a frequency converter that divides or multiplies the original signal, and a frequency converter that divides or multiplies the original signal. A switching means for switching between a signal and an output signal of the frequency converter to selectively output one of the signals, and a counter for frequency-dividing the output signal of the switching means and outputting a reference signal; The signal frequency supplied to the counting input of the counter is temporarily increased by temporarily switching the means at a timing synchronized with a signal synchronized with the original signal for a predetermined period according to the required phase shift amount of the reference signal. 1. A phase shift circuit characterized in that the phase shift circuit is configured to provide a leading phase change or a lagging phase change by temporarily lowering the value. 2. A signal generation circuit that divides the frequency of an original signal by a counter to obtain a reference signal, which includes an oscillator that outputs the original signal, and a first oscillator that divides or multiplies the frequency of the original signal.
a frequency converter, and an output signal of a second frequency converter that divides or multiplies the original signal by a different factor than that of the first frequency converter, and an output signal of the first frequency converter. a switching means for selectively outputting a signal, and a counter for frequency-dividing the output signal of the switching means and outputting a reference signal; The signal frequency supplied to the counting input of the counter is temporarily switched at a timing synchronized with a signal synchronized with the original signal, and the signal frequency supplied to the counting input of the counter is temporarily increased to produce a leading phase change or temporarily lowered to produce a delayed phase change. A phase shift circuit characterized in that it is configured to provide a phase change.