JPH0262794A - Method for writing eprom - Google Patents

Abstract

PURPOSE:To reduce a decoder and to improve writing speed by storing prescribed data in a latch circuit with page data latch mode, and supplying a writing signal commonly to each EPROM with page program mode. CONSTITUTION:When prescribed signal level is provided to a terminal CE, a terminal OE and a terminal PGM, the page data latch mode is made and data on a data bus is stored in a latch circuit 11. Next, another signal is supplied to the terminal CE and the terminal OE, the page program mode is made by feeding the writing signal to the terminal PGM and the data being stored in the latch circuit 11 is written in a memory cell 12. Thus, since the data which are previously stored in the latch circuit 11 of each EPROM can be written at a time, the decoder for writing signal selection is unnecessary and simultaneously the writing speed can be improved.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an EPROM writing method, and particularly to an EPROM writing method.
OM is mounted on a printed board and written to it [Conventional technology] EPROM has a small chip size relative to the amount of data that can be written, and can be rewritten a predetermined number of times, so it is widely used in numerical control equipment, robot equipment, etc. There is.

On the other hand, a considerable number of EPROMs are required for these devices, and a single printed board usually requires a considerable amount of EPROM.
Implement PROM. Data is then written into each EPROM in the mounted state.

In addition, in EPROMs with a storage capacity of about IM bits, in addition to the byte write mode, there are two ways to write data: page write mode, which has a faster writing speed; I was writing.

[Problem to be solved by the invention]

However, in this case, two decoders are required: one for selecting the EPROM to be written to, and the other for selecting and applying a write signal to that EPROM. Such a decoder is necessary only when writing to the EPROM, and is unnecessary when the printed board on which the EPROM is mounted is mounted in a control device and used.

The present invention has been made in view of these points, and is
An object of the present invention is to provide a writing method for an EPROM in which the PROM is mounted on a printed board and written therein, which reduces the number of decoders and increases the writing speed.

[Means to solve the problem]

In the present invention, in order to solve the above problems, a plurality of EPRO
In the EPROM writing method in which M is mounted on a printed board and written, each E
A method for writing an EPROM, characterized in that predetermined data is stored in a latch circuit of the PROM, a write signal is commonly given to each of the EPROMs in a page program mode, and the predetermined data is written to each of the EPROMs at once. , provided.

[Effect]

Each EPROM using page data latch mode
Predetermined data is stored in the latch circuit. Next, by commonly applying a write signal to each EPROM in page program mode, the data stored in each latch is written to each EPROM at once. Therefore, a decoder for selecting a write signal is not required and the writing speed is increased.

〔Example〕

Hereinafter, one embodiment of the present invention will be described based on the drawings. In the following explanation, bars representing negative states, which are added above symbols representing terminals or signals in FIGS. 1 to 3, will be omitted.

Figure 2 shows an overview of EPROM. In the figure, 10 is an EPROM. A latch circuit 11 has a latch inside. Reference numeral 12 denotes a memory cell, which has a storage capacity of approximately IM bits. A bus 13 includes both an address bus and a data bus.

When predetermined signal levels, which will be described later, are applied to the terminals CE, OE, and PGM, the page data latch mode is entered, and data on the data bus is stored in the latch circuit 11. Subsequently, another signal level to be described later is applied to the terminal CE and the terminal OE, and a write signal is applied to the terminal PGM to enter the page program mode, and the data stored in the launch circuit 11 is written into the memory cell 12.

FIG. 3 shows the setting conditions for page data latch mode and page program mode. 21 is a column representing the type of page mode. Columns 22, 23, and 24 indicate the signal level of the terminal CE, the signal level of the terminal OE, and the signal level of the terminal PGM of the EPROM, respectively. 2
5 is a column showing the voltage applied to the terminal VPP, and 26 is a column showing the voltage applied to the terminal CC.

To set page data latch mode, use terminal C
E and terminal PGM are set to high level, and terminal OE is set to low level. To enter page program mode,
Set terminal CE and terminal OE to high level, and set terminal PGM to 0.
．． A low level pulse write signal of about 1 to 1 m5ec is given.

In either case, +12.
5V, and +6V (7) voltage is applied to terminal vcc (.

FIG. 1 is a block diagram of a printed circuit board mounted with an EPROM for implementing the present invention. In the figure, l is a memory board, 2 is an address bus, and 3 is a data bus. A decoder 4 selects and outputs one of the signals OEl to 0E4 (low level signals) according to the input signal from the address bus 2. 10a-10d are EP
Although four EPROMs are shown here, in reality, a large number of EPROMs may be installed as necessary. Terminal PGMI is a terminal commonly connected to terminal PGM of EPROM I Oa-10d, and terminal CEL is EPRO.
This is a terminal to which the terminals CE of MI Oa to 10 d are commonly connected.

First, terminal CEI and terminal PGMI are set to high level. When decoder 4 outputs signal OEI, EPRO
M10a enters the page data latch mode, and data on the data bus 3 is stored in the latch circuit of EPROMloa. Next, the data on the data bus 3 is stored in the latch circuit of the EPROM 10b by outputting the signal OE2. Similarly, by outputting signals OE3 and OE4, predetermined data is also stored in each of the latches of EPROMI Oc and 10d.

Next, the output of the decoder 4 is stopped and the output of each EPROM is
Set the E terminal to high level. Further, the terminal CEI is set to a high level. Here, when a write signal is applied to the terminal PGMI, all the EPROMs enter the page program mode, so that the data stored in the latch circuit of each EPROM is written to the memory cells of each EPROM at once. In this way, it is possible to write to multiple EPROMs on the memory board l at once.

〔Effect of the invention〕

As explained above, in the present invention, by applying write pulses to each EPROM at the same time, each EPROM is written in advance.
The data stored in the latch circuit can be written all at once. Therefore, there is no need for a decoder for selectively applying write signals to each EPROM, simplifying wiring and improving economical efficiency.

Furthermore, since the write signal only needs to be applied once, the write time is shortened.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a printed circuit board equipped with an EPROM for implementing the present invention, FIG. 2 is a diagram showing an outline of the EPROM, and FIG. 3 is a diagram showing setting conditions for page write mode. 1------------------Memory board 2--
---------Address bus 3...--Data bus 4--Decoder 10 a ~ 1
0 d--------EP ROMll--・・-
−・−・−Latch circuit 12・−−1−・・・・−・−Memory cell patent applicant FANUC Co., Ltd. agent Patent attorney Takeshi Hattori Figure 2

Claims (1)

[Claims] (1) In an EPROM writing method in which multiple EPROMs are mounted on a printed board and written, predetermined data is stored in the latch circuit of each EPROM in page data latch mode, and common to each EPROM in page program mode. A method for writing an EPROM, characterized in that the predetermined data is written to each EPROM at once by applying a write signal to the EPROM.