JPH0260373A - Encoding circuit for facsimile equipment - Google Patents

Abstract

PURPOSE:To increase the run length encoding speed by using flag information of a run length converting circuit to reduce the number of times of transfer of run length data between the run length converting circuit and a run length encoding circuit. CONSTITUTION:A run length converting circuit 1 outputs a picture signal transfer clock 12 to take in a picture signal 11 with one byte as the unit. When run length data will be sent with lower one byte, a flag signal is set to the low level and a run length ready signal 14 is set to the high level to inform a run length encoding circuit 2 of this sending. The circuit 2 detects it by the flag signal 15 that the run length is indicated by only the lower byte, and a run length address signal 22 is set to the low level to select run length lower data, and a run length read pulse 21 is outputted to read in this data. The circuit 2 encodes the read run length and outputs a code output 23 at the timing of a code clock 24.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to facsimile machines, and more particularly to facsimile encoding circuits.

Conventionally, in this type of encoding circuit, run-length data is exchanged between a run-length conversion circuit and a run-length encoding circuit, regardless of whether the run length is long or short. Methods have been proposed for transferring data and lower-level data.

Problems to be Solved by the Invention However, in image signals handled by facsimile,
There is a high probability that short run lengths will occur, and in order to convey such short run length information, it is not necessary to send the run length information separately to upper and lower parts, but to convey run length information only using the lower information bits. Can be done. Therefore, in the conventional method, the number of transfers of run-length information increases because upper and lower data are sent respectively, which is disadvantageous in terms of processing speed.

The present invention has been made in view of the above-mentioned conventional circumstances, and
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a novel facsimile encoding circuit which makes it possible to solve the above-mentioned problems inherent in the conventional technology.

Means for Solving Problem No. In order to achieve the above object, the facsimile encoding circuit according to the present invention sequentially captures white/black binary image data line by line and detects change points to detect white/black binary image data. Converts to black run length, and in the case of a long run length, divides the run length data into upper data and lower data and outputs it, and in the case of a short run length, flag information indicating only lower data and no upper data. A run-length conversion circuit that outputs each of and a run-length encoding circuit that outputs a code.

Embodiment Next, a preferred embodiment of the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a facsimile encoding circuit according to the present invention, and FIGS. 2 and 3 are run length data and time charts for explaining the present invention in detail.

In FIG. 1, reference number 1 is a run-length conversion circuit;
2 is a run-length encoding circuit, 11 is an image signal, 12 is an image signal transfer lock, 13 is a run-length bus, 14 is a run-length ready signal, 15 is a flag signal, 21 is a run-length read pulse, 22 23 represents a run-length address signal, 23 represents a code output, and 24 represents a code clock.

Next, the operation of this embodiment will be explained using FIGS. 2 and 3.

In FIG. 2, the run-length data has a 2-byte structure of 1 upper byte and 1 lower byte.

In FIG. 3, the run length conversion circuit 1 outputs the image signal transfer lock 12 and takes in the image signal 11 in units of 1 byte. Next, when the change point is detected, the run length is ready, and the lower 1 byte is to be sent as run length data, the flag signal 15 is set to "Lo" level and the run length ready signal 14 is turned "ON".

(°old° level) and informs the run length encoding circuit 2. The run length encoding circuit 2 receives the flag signal 1
5, it knows that the run length is only the lower one, sets the run length address signal 22 to 'Lo' level, selects the run length lower data, outputs the run length read pulse 21, and reads it.Next. The run length encoding circuit 2 encodes the read run length and outputs it as a code output 23 at the timing of the code clock 24.

Further, the run-length encoding circuit 2 outputs the flag signal 15 when the run-length ready signal 14 turns “ON”.
If there was a "old parallel level", we would know that upper data exists as run-length data, first set the run-length address signal 22 to °'Lo, read the lower 1 byte data, then read the run-length address signal 22. The signal 22 is changed to "Old", the upper 1 byte data is read, this is run-length encoded, and is output as a code output 23.

As described above, when transferring run-length data that requires a maximum of 2 bytes, if the run-length is short, the run-length data can be transferred in 1 byte.

DETAILED DESCRIPTION OF THE INVENTION According to the present invention, when transmitting run-length data, the number of times the run-length data is transmitted can be determined by checking the flag signal indicating whether or not there is an upper run-length data. The run-length encoding speed can be increased.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG.
3 are run length data and time charts showing the operation of an embodiment of the present invention. 1... Run-length conversion circuit, 2... Run-length encoding circuit agent

Claims (1)

[Claims] Sequentially captures the white/black binary image signal data line by line, detects change points, converts it to white/black run lengths, and in the case of long run lengths, converts the run length data into upper data and lower data. A run-length conversion circuit that divides and outputs and outputs only the lower data and flag information indicating that there is no upper data in the case of a short run length, and a run-length conversion circuit that judges the output of the conversion circuit based on the flag information and outputs only the lower data. and a run-length encoding circuit that reads lower-order data when upper-order data and lower-order data are present, reads both of them, encodes run-lengths, and outputs a code, the run-length conversion circuit and the run-length encoder circuit 1. An encoding circuit for a facsimile apparatus, characterized in that the number of run-length data transfers between said run-length conversion circuit and said facsimile apparatus is reduced by using flag information output from outside said run-length conversion circuit.