JPS60253372A - Picture signal coding system - Google Patents

Abstract

PURPOSE:To attain a picture signal coding system which can work at a high speed with small memory capacity by storing the changing points of picture signals of each scan line in the form of the number of run lengths and obtaining the coding data from the corresponding address in a coding table based on the stored run length number. CONSTITUTION:The serial picture signals supplied from a reading circuit 1 are supplied directly to a changing point detecting circuit 2 to detect the white and black changing points. Then the run length number, i.e., the output of a run length counter 10 corresponding to said white and black changing points or the abbreviated run length number given from an abbreviated run length producing circuit 9 is stored to a picture signal buffer memory 4. At the same time, the counter 10 is cleared. Then an MPU5 reads data out of the memory 4 and designates the address of a coding ROM table 6 to read out the coding data.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to an image signal encoding method for facsimile.

(Technical Background) Conventionally, circuits with the function of converting image signals in this field have been configured as described in Japanese Patent Application Laid-Open No. 58-88971. Encoded data is obtained by detecting the change point position, storing it as an absolute address, and outputting an address signal of the encoding table during arithmetic processing. FIG. 2 is a block diagram showing this method. One signal read by the reading circuit 1 is detected by the changing point detection circuit 2 and the changing point position counter 3, and the changing point position of one line image signal is detected. Store it in the backup memory 4 as an absolute address and send it to the microprocessor (MPU).
5 outputs the address signal of the encoding ROM table 6 to obtain encoded data from the encoding ROM table 6. However, in this method, the changing point position is stored as an absolute address, so the memory capacity is large.
The disadvantage was that the code structure was also complicated.

(Object of the Invention) An object of the present invention is to obtain an image signal encoding method with a small memory capacity and capable of high-speed encoding.

(Structure of the Invention) The present invention is an image signal encoding method that has an encoding table and compresses and encodes an image signal. This image signal encoding method is characterized in that encoded data is obtained from a corresponding address in the encoding table based on the stored run length number.

(Embodiment) FIG. 1 is a circuit block diagram showing an embodiment of the present invention,
1 is a reading circuit, 2 is a change point detection circuit, 4 is an image signal buffer memory, 5 is a microprocessor (MPU), 6 is an encoding table, and 7 is a parallel serial conversion circuit (P
8 is a code buffer memory, 9 is a shortened run length creation circuit, and 10 is a run length counter. In this figure, the same numbers as in FIG. 2 indicate the same parts.

The reading circuit 1 is connected to a change point detection circuit 2, and the output of the change point detection circuit 2 is connected to a run length counter 10 and an image signal buffer memory 4. A clock (CLK) is connected to a change point detection circuit 2 and a run length counter 10, and an output of the run length counter 3 is connected to an image signal buffer memory 4 and a shortened run length creation circuit 9. The output of the shortened run length counter 9 is connected to the image signal buffer memory 4, and the output of the image signal buffer memory 4 is connected to the microprocessor MPU5. Encoding ROM table 6 connected to MPU 5 and P/S conversion circuit 7
The output of the P/S conversion circuit 7 which performs parallel/serial conversion of data is connected to the code buffer anomaly 8, and the output of the code buffer memory is output as code data.

First, the serial image signal from the reading multi-circuit 1 is directly input to the change point detection circuit 2 to detect the change point between black and white, and the corresponding run length number or shortened run length creation circuit is output from the run length counter 10. The shortened run length number created in step 9 is stored in the image signal buffer memory 4, and at the same time, the run length counter 10 is cleared.

In this case, if the length of one line is 2048 dots, the maximum number of run lengths is 2048 (=2"), and the number of run lengths is 1. Therefore, 12
A bit x 1 bit memory is required.

Similarly, if the minimum value of the number of run lengths is 1 (=2°) and all 2048 dots in the shell line are changing points, the number of run lengths is 2048. Therefore 1
A memory of 2048 bits is required. As described above, if the silane length number is stored in its original form, a memory of 12 bits x 2048 bits is required. The shortened run length refers to a run length in which the bit length of the run length number is limited to N bits when the number of run lengths is 2N or less.

With this shortened run length, it is possible to store a plurality of shortened run lengths at one address in the memory. In this embodiment, an example is shown in which a memory in which one address has 16 bits is used, and a maximum of three shortened run lengths are stored in one address with N=4. FIGS. 3(a) and 3(b) are operational waveform diagrams of main parts of the embodiment.

A clock (CI,
K) is shown in Figure 3 (a) ■, the change point pulse in Figure 3 (a) ■ is detected as the change point of the read image signal in Figure 3 (a) ■, and the corresponding Run length counter 1
The count value from 0, that is, the run length number, is output to the image signal buffer memory 4 or the shortened run length creation circuit 9, and at the same time, the run length counter 10 is reset.

FIG. 3(b) shows an example of encoded lines stored in the image signal buffer memory 4. When the first change point position is detected, the 1/number of runs in the run length counter 1o is H91. l) Since 2'=H10 is larger, it is stored as is from the 1st bit to the 15th bit of the address M of the image signal buffer memory 4, and at the same time the 16th bit (M
SB) stores a logic "0" as a flag F representing the shortened run length. Flag F is a flag representing a shortened run length, and when a shortened run length is stored, the flag F is stored as logic "1".

The run length number of the run length counter 10 when the next change point position is detected is H4,! l) Since it is smaller than HIO, it is stored in the 12th to 15th bits of the address M+1 of the image signal buffer memory 4 as a shortened run length, and the 16th bit (MSB) is stored as a flag F with logic "1". The run length number of the run length counter 10 when the next change point position is detected is H3
Similarly to Ashi, since it is smaller than HIO, 7 of address M+1 of image signal buffer memory 4 is used as a shortened run length.
The 11th bit is 7, and the 11th bit is 7.
A logic "1" is stored as lag F.

When the next change point position is detected, the run length number of the run length counter 10 is H2, which is also smaller than HIO, so the 2nd bit to 5 of the address M+1 of the image signal panzer memory 4 is used as the shortened run length. The 6th bit is stored as a flag and a logic "1" is stored therein. As described above, three shortened run lengths are stored in address M+1 of the image signal buffer memory 4. The first bit (LSB) is DON'T CARE at this time.

The run length number of the run length counter 10 when the next change point position is detected is Hl, which is also smaller than HIO, so the 12th to 15th bits of address M+2 of the image signal buffer memory 4 are used as shortened run lengths. The 16th bit (MSB) is stored as a flag F as a logic "1".

The run length of the run length counter 10 when the next change point position is detected is H15, which is larger than HIO, so the flag F representing the shortened address of the 11th bit of address M+2 is stored as logic rOJ and the 1st bit (LS
B) ~ 10th bit becomes DON''T CARE. Then, 1 of address M+3 of image signal buffer memory 4
H15 is stored in the 1st to 15th bits, and logic "0" is stored as a flag F in the 16th bit (MSB).

Next, the MPU 5 reads the above-mentioned data from the image signal buffer memory 4, specifies the address of the encoding ROM table 6, and reads the encoded data. When using the modified Huffman (MH) method, the encoded line stored in the image signal buffer memory 4 is read out, the shortened run length is converted into the number of run lengths by the MPU 5, and the sequential code and bit length are stored as they are. Encoding ROM table 6
output as the address. Further, line synchronization signals and fill signals are given to the encoding ROM table 6 by instructions from the MPU 5, and are handled in the same way as the original code. Encoding ROM
The output of the table 6 is subjected to multi-parallel/serial conversion by a P/S conversion circuit 7, and code data is input to a code buffer 8.

By reading out the code buffer 8, code data can be obtained. After the above operations are performed for the first and second encoded lines, the process moves on to encoding successive encoded lines.

In addition, in the case of the modine idle (MR) method, the previous reference line and the current encoded line stored in the image signal buffer memory 4 are read out, and the MPU 5 converts the shortened run length into the number of run lengths. Then, arithmetic processing is performed and output as an address of the encoding ROM table 6. The output of the encoding ROM table 6 is subjected to parallel/serial conversion by a P/S conversion circuit 7, and the encoded data is inputted to the encoder buffer memory 8. Code data is obtained by reading the code buffer memory 8. After the above operation is performed for one encoded line, the next line is sequentially encoded.

A comparison of the memory capacity in this embodiment with that in the conventional system is as follows. When 1 line is 2o48 pixels,
The maximum number of change points is 2048i (J"). In the conventional method, the number of pits required for l change point image is 11 bits, so if 1 word (16 bits) is allocated for storing each data, 2048 x 16 bits = 32 On the other hand, in the case of the present invention (when N=4), a maximum of three run lengths can be stored in one word (16 bits), so 16 bits.

tX company = 10.7 K bits. Therefore, the memory capacity is approximately 1/3.

(Effects of the Invention) As explained above, the present invention stores only the run length number as change point information, so there is no need to store and read image signals for one line, and high-speed encoding is facilitated.
Requires less memory capacity.

Since the data is stored as a run length number, efficient calculation processing becomes possible. Furthermore, since the main component is to create the address of the encoded ROM table through arithmetic processing, there is an advantage that the overall hardware configuration is simplified.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing a conventional system, and FIG. 3 is an operational waveform diagram of main parts of the embodiment. l...reading circuit, 2...change point detection circuit, 4...
Image signal buffer memory, 5... microprocessor (
MPU), 6... Encoding ROM table, 7... No e parallel serial (P/S) conversion circuit, 8... Code.
Grafts memory, 9... Shortened run length creation circuit,
lθ...U/Length counter 0 Patent applicant Oki Electric Industry Co., Ltd. 1 Indication of the case 1982 Patent Application No. 108478 2 Name of the invention Image signal encoding method 3 Relationship with the person making the amendment Patent applicant

Claims (1)

[Scope of Claims] (1) In an image signal encoding method that has an encoding table and compresses and encodes an image signal, the change point position of the image signal of each scanning line is stored as a run length number, and An image signal encoding method characterized in that encoded data is obtained from a corresponding address in the encoding table based on the stored run length number. (2L, the image signal encoding method according to claim 1, characterized in that the encoding table is a Modified Huffman (MH) encoding table. (3) Modified Huffman (MH) encoding table is used as the encoding table.゛(
MR) method, and the encoded data is obtained from the corresponding address of the encoding table based on the run length number of the previous reference line and the current encoded line. An image signal encoding method according to claim 1. (4) The image signal encoding method according to claim 1, characterized in that, in the case of a small number of run lengths, a plurality of run length numbers are stored in one address of the storage section.