JPH0254231U - - Google Patents

Info

Publication number
JPH0254231U
JPH0254231U JP13397888U JP13397888U JPH0254231U JP H0254231 U JPH0254231 U JP H0254231U JP 13397888 U JP13397888 U JP 13397888U JP 13397888 U JP13397888 U JP 13397888U JP H0254231 U JPH0254231 U JP H0254231U
Authority
JP
Japan
Prior art keywords
protective film
semiconductor device
substrate
wiring pattern
elastic layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13397888U
Other languages
Japanese (ja)
Other versions
JPH0648836Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988133978U priority Critical patent/JPH0648836Y2/en
Publication of JPH0254231U publication Critical patent/JPH0254231U/ja
Application granted granted Critical
Publication of JPH0648836Y2 publication Critical patent/JPH0648836Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Formation Of Insulating Films (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図〜第3図はこの考案の構成を示す図、第
4図A,Bはこの考案の実施例である半導体装置
の構成を表す図である。また、第5図は従来の半
導体装置の構成を示す図である。 1……基板、2……配線パターン、3……保護
膜、4,5……シリコーンゴム層(弾性体層)。
1 to 3 are diagrams showing the structure of this invention, and FIGS. 4A and 4B are diagrams showing the structure of a semiconductor device which is an embodiment of this invention. Further, FIG. 5 is a diagram showing the configuration of a conventional semiconductor device. DESCRIPTION OF SYMBOLS 1...Substrate, 2...Wiring pattern, 3...Protective film, 4, 5...Silicone rubber layer (elastic layer).

Claims (1)

【実用新案登録請求の範囲】 基板上に配線パターンと保護膜を形成した半導
体装置において、 保護膜の上部もしくは下部の何れか一方または
両方に弾性体層を形成したことを特徴とする半導
体装置。
[Scope of Claim for Utility Model Registration] A semiconductor device comprising a wiring pattern and a protective film formed on a substrate, characterized in that an elastic layer is formed on either or both of the upper and lower parts of the protective film.
JP1988133978U 1988-10-13 1988-10-13 Semiconductor device Expired - Lifetime JPH0648836Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988133978U JPH0648836Y2 (en) 1988-10-13 1988-10-13 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988133978U JPH0648836Y2 (en) 1988-10-13 1988-10-13 Semiconductor device

Publications (2)

Publication Number Publication Date
JPH0254231U true JPH0254231U (en) 1990-04-19
JPH0648836Y2 JPH0648836Y2 (en) 1994-12-12

Family

ID=31392339

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988133978U Expired - Lifetime JPH0648836Y2 (en) 1988-10-13 1988-10-13 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0648836Y2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5662327A (en) * 1979-10-26 1981-05-28 Hitachi Ltd Semiconductor device
JPS5740935A (en) * 1980-08-25 1982-03-06 Fujitsu Ltd Semiconductor device
JPS58206144A (en) * 1982-05-26 1983-12-01 Hitachi Ltd Manufacture of semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5662327A (en) * 1979-10-26 1981-05-28 Hitachi Ltd Semiconductor device
JPS5740935A (en) * 1980-08-25 1982-03-06 Fujitsu Ltd Semiconductor device
JPS58206144A (en) * 1982-05-26 1983-12-01 Hitachi Ltd Manufacture of semiconductor device

Also Published As

Publication number Publication date
JPH0648836Y2 (en) 1994-12-12

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