JPH0245165A - Thermal head - Google Patents

Thermal head

Info

Publication number
JPH0245165A
JPH0245165A JP19682988A JP19682988A JPH0245165A JP H0245165 A JPH0245165 A JP H0245165A JP 19682988 A JP19682988 A JP 19682988A JP 19682988 A JP19682988 A JP 19682988A JP H0245165 A JPH0245165 A JP H0245165A
Authority
JP
Japan
Prior art keywords
heating element
type
transistor
thermal head
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19682988A
Other languages
Japanese (ja)
Inventor
Masatoshi Yazaki
矢崎 正俊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP19682988A priority Critical patent/JPH0245165A/en
Publication of JPH0245165A publication Critical patent/JPH0245165A/en
Pending legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/315Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material
    • B41J2/32Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by selective application of heat to a heat sensitive printing or impression-transfer material using thermal heads
    • B41J2/335Structure of thermal heads
    • B41J2/34Structure of thermal heads comprising semiconductors

Landscapes

  • Electronic Switches (AREA)

Abstract

PURPOSE:To obtain a thermal-head, in which a driving element being difficult to be broken, having excellent reliability, enabling high integration and high- speed operation and having low voltage and high current characteristics and a heating element are unified, by composing the driving element joined with the heating element of a bipolar-transistor having a hetero-junction and forming the heating element of a polycrystalline silicon layer, grain size of which is increased through laser irradiation. CONSTITUTION:A bipolar-transistor having an n-p-n type hetero-junction and a heating element region 10 are shaped onto an insulating base body 1 such as a quartz substrate, a sapphire substrate, etc. A p-n-p type may also be used as the transistor having the hetero-junction as a driving element besides an n-p-n type. An n<+> type silicon seed layer 2 on the insulating base body 1 is crystallized through the energy beam irradiation with electron beams, etc. High currents can be acquired easily at low voltage under the state of the grounding of a base electrode 6 in the characteristics of the transistor, thus manufacturing the element enabling high-speed operation. Accordingly, the degree of integration is improved, and high accurate printing is performed.

Description

【発明の詳細な説明】 [産業上の利用分野コ プリンターや複写機などに用いられるサーマル・ヘッド
に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] This invention relates to thermal heads used in coprinters, copying machines, etc.

[従来の雑Vq] 従来の技術としては、Mi、crocomputer 
Conference  in  Japan  ’8
8  PrΦceeding  P。
[Conventional miscellaneous Vq] As conventional technology, Mi, crocomputer
Conference in Japan '8
8 PrΦceeding P.

96〜94  rOMO8超薄膜トランジスタを用いた
一体型サーマルヘッド」に記載されたものがあるこれは
第5図に示すように石英基板15上に多結晶シリコン薄
膜14を半導体層とする電界効果トランジスタを作成し
、ゲート電極15と同一の物質で発熱体18を作成し、
電界効果トランジスタを駆動゛素子とする発熱体1日一
体型のサーマル・ヘッドを実現するものであった。
96-94 "Integrated thermal head using rOMO8 ultra-thin film transistor" This is a method to create a field effect transistor using a polycrystalline silicon thin film 14 as a semiconductor layer on a quartz substrate 15, as shown in FIG. Then, the heating element 18 is made of the same material as the gate electrode 15,
This was to realize a thermal head that was integrated into a heating element for one day using a field effect transistor as a driving element.

[発明が解決しようとする課題] しかし、かかる従来のサーマル・ヘッドは、絶縁性基体
の一種である石英基板15上に、電界効果トランジスタ
の半導体層となる多結晶シリコン薄膜14を直接成膜し
ているため結晶性が悪(、高特性を実現するために多結
晶シリコン簿膜14の膜厚を約400又と非常に薄く成
膜する必要があった。その結果、従来の多結晶シリコン
を半導体層とする電界効果トランジスタに比べ実効移動
度は10倍程度太き(なるが、一方、多結晶シリコン薄
@14が約400にと非常に薄いため多結晶シリコン薄
膜14と接触するソース電極16とドレイン電極17と
の接触不良が生じやすく、また、たとえ、実効移動度が
45〜80 eta/ V−secと従来の多結晶シリ
コンを半導体層とする電界効果トランジスタの実効移動
度より10倍程度向上しても、単結晶シリコンを半導体
層とする電界効果トランジスタの実効移動度の値に比べ
ると10分の1程度にしかならなかった。このため、チ
ャネル幅20μm、チャネル長7μmの素子で得られる
電流特性は、ソース電極16接地状態においてゲー)W
ilsに5ボルト、ドレイン電極17に2ボルト印加し
てドレイン電極17及びソース電極16の間に流れる電
流が、1ミリアンペア以下と低電流なものである。この
ため、サーマル・ヘッドの駆動の際には、トランジスタ
のチャンネル幅を大きくして高電流を得る必要があり、
このためにトランジスタの容量が増え高速動作は不可能
になり、同時に、高集積も不可能で、より高精細な印刷
を可能にするサーマル・ヘッドの実現は困難であった。
[Problem to be Solved by the Invention] However, in such a conventional thermal head, a polycrystalline silicon thin film 14, which becomes a semiconductor layer of a field effect transistor, is directly formed on a quartz substrate 15, which is a type of insulating substrate. In order to achieve high characteristics, it was necessary to form the polycrystalline silicon film 14 very thinly, approximately 400 mm thick.As a result, conventional polycrystalline silicon The effective mobility is about 10 times thicker than that of a field effect transistor using a semiconductor layer (However, on the other hand, since the polycrystalline silicon thin film 14 is very thin at about 400 Ω, the source electrode 16 in contact with the polycrystalline silicon thin film 14 Poor contact with the drain electrode 17 is likely to occur, and even if the effective mobility is 45 to 80 eta/V-sec, it is about 10 times the effective mobility of a conventional field effect transistor whose semiconductor layer is polycrystalline silicon. Even if improved, the effective mobility was only about one-tenth of the value of a field-effect transistor with a single-crystal silicon semiconductor layer.For this reason, a device with a channel width of 20 μm and a channel length of 7 μm could obtain When the source electrode 16 is grounded, the current characteristics are as follows:
The current flowing between the drain electrode 17 and the source electrode 16 by applying 5 volts to ils and 2 volts to the drain electrode 17 is a low current of 1 milliampere or less. Therefore, when driving a thermal head, it is necessary to increase the channel width of the transistor to obtain a high current.
This increased the capacity of the transistors, making high-speed operation impossible, and at the same time making high integration impossible, making it difficult to realize a thermal head that would enable higher-definition printing.

また、トランジスタの半導体層を構成する多結晶シリコ
ン薄膜14は、結晶欠陥を多(含むために経時変化を起
こしやすく信頼性に欠け、さらに、多結晶シリコン薄膜
14とゲート電極150間にあるゲート絶縁膜21の膜
厚は500オングストロームと極めて薄いため静電気に
よる破壊を生じやすいという問屋を有していた。
In addition, the polycrystalline silicon thin film 14 constituting the semiconductor layer of the transistor contains many crystal defects, so it tends to change over time and lacks reliability. There was a wholesaler who said that the film 21 was extremely thin at 500 angstroms and was easily damaged by static electricity.

そ40で、本発明は従来のこのような問題点を解決する
ため、破壊しにくく信頼性に優れ、高集積、高速動作可
能な低電圧高・電流特性を有する駆動素子と発熱体が一
体化したサーマル・ヘッドを提供することを目的とする
Therefore, in order to solve these conventional problems, the present invention integrates a driving element and a heating element, which are hard to break, have excellent reliability, are highly integrated, and have low voltage, high current characteristics that enable high-speed operation. The purpose is to provide a thermal head with

[課題を解決するための手段] 上記課題な解決するため、本発明のサーマル・ヘッドは
、発熱体と駆動素子が絶縁性基体上に作り込まれたサー
マル・ヘッドにおいて、前記発熱体と接合する前記駆動
素子かへテロ接合を有するバイポーラ・トランジスタよ
り成り、前記発熱体がレーザ照射により大粒径化した多
結晶シリコン層より成ることを特徴とする。
[Means for Solving the Problems] In order to solve the above-mentioned problems, the thermal head of the present invention has a heating element and a driving element formed on an insulating base, in which a heating element and a driving element are bonded to the heating element. The driving element is a bipolar transistor having a heterojunction, and the heating element is a polycrystalline silicon layer whose grain size has been increased by laser irradiation.

[実施例] 以下に本発明の実施例を図面にもとづいて説明する。第
1図において、石英基板、サファイヤ基板、フッ化物積
層基体、マグネシア・スピネル積層基体などの絶縁性基
体1上にnpn型のへテロ接合を有するバイポーラ・ト
ランジスタと発熱体領域10を形成した一実施例の斜視
断面図を示す。なお、駆動素子となるヘテロ接合を有す
るバイポーラ・トランジスタは、本実施例におけるよう
にnpn型でも可能だが、Pn:[)型でも良い。絶縁
性基体1上にあるn+型シリコンのシート層2はhレー
ザ・ビームや電子ビームなどのエネルギー線の照射によ
り結晶化されている。このn 型シリコンのシード層2
はコレクタ領域となるn型ゲルマニウム層3の選択エピ
タキシャル成長時のシード層(種結晶層)としての役割
りを有する他、サーマル・ヘッドの発熱体領域10を形
成し、さらにコレクタ領域となるn+型ゲルマニウム層
3と接触したコレクタ電極として、の役割りも有1゜て
いる。また、この結晶化したn 型シリコンのシード層
2の存在により、安価で大面積を有する絶縁性基体上で
の高品質結晶の成長が容易になり、選択エピタキシャル
成長により成膜されたコレクタ領域のn型ゲルマニウム
層5とベース領域を構成するp+型ゲルマニウム層4の
結晶は良質なものになる。このため、このようにして作
成されたヘテロ接合を有するバイポーラ・トランジスタ
の特性は、第4図に示すように、ペース電極6接地状態
で低電圧で高電流を得ることが容易で高速動作可能な素
子となる。この特性を示す本実施例の素子のサイズは5
0μyxX50μmであり、素子のサイズは小さい。し
たがって高集積化も可能であり、高精細な印刷を可能と
するサーマル・ヘッドを実現できる。
[Examples] Examples of the present invention will be described below based on the drawings. In FIG. 1, a bipolar transistor having an npn type heterojunction and a heating element region 10 are formed on an insulating substrate 1 such as a quartz substrate, a sapphire substrate, a fluoride laminated substrate, a magnesia spinel laminated substrate, etc. Figure 3 shows a perspective cross-sectional view of an example. Note that the bipolar transistor having a heterojunction serving as a driving element may be an npn type as in this embodiment, but may also be a pn:[) type. A sheet layer 2 of n+ type silicon on an insulating substrate 1 is crystallized by irradiation with an energy beam such as an h-laser beam or an electron beam. This n-type silicon seed layer 2
In addition to serving as a seed layer (seed crystal layer) during selective epitaxial growth of the n-type germanium layer 3 that will become the collector region, it also forms the heating element region 10 of the thermal head, and also serves as the n+-type germanium layer that will become the collector region. It also serves as a collector electrode in contact with layer 3. In addition, the presence of this crystallized n-type silicon seed layer 2 facilitates the growth of high-quality crystals on an inexpensive and large-area insulating substrate, making it possible to easily grow a high-quality crystal on an inexpensive and large-area insulating substrate. The crystals of the p+ type germanium layer 4 constituting the base region and the type germanium layer 5 are of good quality. Therefore, the characteristics of the bipolar transistor having a heterojunction created in this way are as shown in FIG. 4, as shown in FIG. Becomes an element. The size of the device of this example exhibiting this characteristic is 5
The size of the element is 0 μy×50 μm, which is small. Therefore, high integration is possible, and a thermal head capable of high-definition printing can be realized.

以上、説明したように、第1図のn 型シリコンのシー
ド層2上に成膜された結晶層は結晶欠陥の少ない膜であ
るから、絶縁性基体1上に多結晶シリコン薄膜を構成し
て作成した素子よりも安定で長寿命である。次に、ヘテ
ロ接合を有するバイポーラ・トランジスタのコレクタ領
域とペース領域を構成する膜の物質の種類を変えた一実
施例の斜視断面図を第2図に示す。第1図に示したヘテ
ば接合を有するバイポーラ・トランジスタと異なる点は
、第2図のトランジスタのコレクタ領域はn型シリコン
層で、ペース領域はp+型シリコン層になっている欠点
である。エミッタ領域は、第1図、第2図の実施例共に
n+型シリコン層5である。両実施例ともフレクタ、ベ
ース、エミッタの6領域がn型、p型、n型の半導体層
よりなるnpn型のへテロ接合を有するバイポーラ・ト
ランジスタであり基本的動作は同じであるから、半導体
層を構成する材料の選択域は広い。この他、GaAsや
A t G a A日の使用も可能である。第3図とし
て、第2図に示したヘテロ接合を有するバイポーラ・ト
ランジスタと同じものを別工程により作成した実施例を
示す斜視断面図を示す。第2図の素子と異なる点は、第
3図において、エミッタ電極7とエミッタ領域となるn
9シリコン層5とが同時に成形され、工程が、簡単化さ
れている点と、エミッタ電極Z上で層間絶縁膜8を挾ん
でペース電極6と立体交差している点にある。このよう
な構造のへテロ接合を有するバイポーラ・トランジスタ
でも動作上何ら問題がなく、製造工程の簡単化も容易で
ある。
As explained above, since the crystal layer formed on the n-type silicon seed layer 2 in FIG. It is more stable and has a longer lifespan than the manufactured element. Next, FIG. 2 shows a perspective sectional view of an embodiment in which the types of materials of the films constituting the collector region and space region of a bipolar transistor having a heterojunction are changed. The difference from the bipolar transistor having a heterojunction shown in FIG. 1 is that the collector region of the transistor shown in FIG. 2 is an n-type silicon layer, and the space region is a p+-type silicon layer. The emitter region is an n+ type silicon layer 5 in both the embodiments shown in FIG. 1 and FIG. Both embodiments are bipolar transistors having an npn-type heterojunction in which the six regions of the flexor, base, and emitter are composed of n-type, p-type, and n-type semiconductor layers, and the basic operation is the same. There is a wide range of materials to choose from. In addition, it is also possible to use GaAs or AtGaAs. FIG. 3 is a perspective cross-sectional view showing an example in which the same bipolar transistor having a heterojunction shown in FIG. 2 is manufactured by a different process. The difference from the device in FIG. 2 is that in FIG. 3, the emitter electrode 7 and the n
9 silicon layer 5 are formed at the same time, simplifying the process, and interlayer insulating film 8 is sandwiched between the emitter electrode Z and the space electrode 6 intersects three-dimensionally. A bipolar transistor having a heterojunction having such a structure has no operational problems, and the manufacturing process can be easily simplified.

[発明の効果コ 本発明のサーマル・ヘッドは、以上説明したように、絶
縁性基体上にヘテロ接合を有するバイポーラ・トランジ
スタと発熱体を作り込むことによって、安価で大面積の
各種絶縁性基体を使った、長寿命で高集積と低電圧高速
動作容易な高精細印刷を可能とするサーマル・ヘッドを
実現するという効果を有する。
[Effects of the Invention] As explained above, the thermal head of the present invention can be used on various types of inexpensive, large-area insulating substrates by fabricating a bipolar transistor having a heterojunction and a heating element on an insulating substrate. This has the effect of realizing a thermal head that has a long life, high integration, low voltage, high-speed operation, and can easily perform high-definition printing.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明のサーマル・ヘッドの一実施例を示す
斜視断面図。 第2図、第3図は、本発明のサーマル・ヘッドの他の実
施例を示す斜視断面図。 第4図は、本発明のサーマル・ヘッドの実施例のへテロ
接合を有するバイポーラ・トランジスタの電流・電圧特
性を示す図。 第5図は、従来のサーマル・ヘッドの斜視断面図。 1・・・・・・・・絶縁性基体 2・・・・・・・・・n+型シリコンのシード層6・・
・・・・・・・n型ゲルマニウム層4・・・・・・・・
・p+型ゲルマニウム層5・・・・・・・・・n+79
37層 6・・・・・・司ペース電極 7・・・・・・・・・エミッタ電極 8・・・・・・・・・層間絶縁膜 9・・・・・・・・・絶縁膜 10・・・・・・発熱体領域 11・・・・・・n型シリコン層 12・・・・・・p+型シリコン層 13・・・・・・石英基板 14・・・・・・多結晶シリコン薄贋 5・・・・・・ゲート電極 6・・・・・・ソース′wL極 7・・・・・・ドレイン電極 8・・・・・・発熱体 9・・・・・・ソース配線 0・・・・・・ゲート配線 1・・・・・・ゲート絶縁膜 以上
FIG. 1 is a perspective sectional view showing an embodiment of the thermal head of the present invention. 2 and 3 are perspective sectional views showing other embodiments of the thermal head of the present invention. FIG. 4 is a diagram showing the current/voltage characteristics of a bipolar transistor having a heterojunction in the embodiment of the thermal head of the present invention. FIG. 5 is a perspective sectional view of a conventional thermal head. 1...Insulating base 2...N+ type silicon seed layer 6...
・・・・・・N-type germanium layer 4・・・・・・・・・
・p+ type germanium layer 5......n+79
37 Layer 6...Pace electrode 7...Emitter electrode 8...Interlayer insulating film 9...Insulating film 10 ... Heating element region 11 ... N type silicon layer 12 ... P + type silicon layer 13 ... Quartz substrate 14 ... Polycrystalline silicon Counterfeit 5...Gate electrode 6...Source'wL pole 7...Drain electrode 8...Heating element 9...Source wiring 0 ...Gate wiring 1...Gate insulating film or higher

Claims (1)

【特許請求の範囲】[Claims]  発熱体と駆動素子が絶縁性基体上に作り込まれたサー
マル・ヘッドにおいて、前記発熱体と接合する前記駆動
素子がヘテロ接合を有するバイポーラ・トランジスタよ
り成り、前記発熱体がレーザ照射により大粒径化した多
結晶シリコン層より成ることを特徴とするサーマル・ヘ
ッド。
In a thermal head in which a heating element and a driving element are built on an insulating substrate, the driving element connected to the heating element is made of a bipolar transistor having a heterojunction, and the heating element is made to have a large particle size by laser irradiation. A thermal head characterized by being made of a polycrystalline silicon layer.
JP19682988A 1988-08-05 1988-08-05 Thermal head Pending JPH0245165A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19682988A JPH0245165A (en) 1988-08-05 1988-08-05 Thermal head

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19682988A JPH0245165A (en) 1988-08-05 1988-08-05 Thermal head

Publications (1)

Publication Number Publication Date
JPH0245165A true JPH0245165A (en) 1990-02-15

Family

ID=16364358

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19682988A Pending JPH0245165A (en) 1988-08-05 1988-08-05 Thermal head

Country Status (1)

Country Link
JP (1) JPH0245165A (en)

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