JPH024365U - - Google Patents
Info
- Publication number
- JPH024365U JPH024365U JP8090488U JP8090488U JPH024365U JP H024365 U JPH024365 U JP H024365U JP 8090488 U JP8090488 U JP 8090488U JP 8090488 U JP8090488 U JP 8090488U JP H024365 U JPH024365 U JP H024365U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- input terminal
- sync
- clamp
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000926 separation method Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Picture Signal Circuits (AREA)
- Television Receiver Circuits (AREA)
Description
第１図は本考案の映像信号処理回路の第１の実
施例を示すブロツク図、第２図は第１図の動作説
明用の信号波形図、第３図は本考案の映像信号処
理回路の第２の実施例を示すブロツク図、第４図
は従来の映像信号処理回路を示すブロツク図、第
５図は第４図の動作説明用の信号波形図である。
１，４，７……入力端子、２，５，８……増幅
回路、３，６，９……クランプ回路、１０……Ｃ
ＲＴ、１１……同期信号入力端子、１２……同期
分離回路、１３……切換回路、１４……偏向回路
、１５，１６……クランプパルス発生回路、１７
，２０……ＥＯＲ回路、１８……単安定マルチバ
イブレータ、１９……両極性対応回路、Ｃ１，Ｃ
２……コンデンサ、ＣＰ１〜ＣＰ４……クランプ
パルス、Ｄ……ダイオード、ＨＰ１，ＨＰ２……
同期信号、Ｒ……抵抗、ＴＢ……ブランキング期
間、ＴＳ……画像表示期間（映像信号が存在する
期間）。
FIG. 1 is a block diagram showing a first embodiment of the video signal processing circuit of the present invention, FIG. 2 is a signal waveform diagram for explaining the operation of FIG. 1, and FIG. 3 is a diagram of the video signal processing circuit of the present invention. FIG. 4 is a block diagram showing a conventional video signal processing circuit, and FIG. 5 is a signal waveform diagram for explaining the operation of FIG. 4. 1, 4, 7... Input terminal, 2, 5, 8... Amplifier circuit, 3, 6, 9... Clamp circuit, 10... C
RT, 11...Synchronization signal input terminal, 12...Synchronization separation circuit, 13...Switching circuit, 14...Deflection circuit, 15, 16...Clamp pulse generation circuit, 17
, 20... EOR circuit, 18... Monostable multivibrator, 19... Bipolar compatible circuit, C 1 , C
2 ...Capacitor, CP1 to CP4 ...Clamp pulse, D...Diode, HP1 , HP2 ...
Synchronization signal, R...resistance, TB...blanking period, TS...image display period (period in which a video signal exists).
Claims (1)
号を、そのブランキング期間においてクランプパ
ルスによりクランプするクランプ回路と、 前記映像入力信号から同期信号を分離する同期
分離回路と、 前記同期分離回路の出力信号と、前記同期信号
入力端子よりの入力信号を切り換えて出力する切
換回路と、 前記同期信号入力端子への入力の有無に応じて
、同期信号の前縁と後縁のどちらかにパルスのス
タート・タイミングを切り換えたクランプパルス
を前記クランプ回路へ出力するクランプパルス発
生回路とを有して構成したことを特徴とする映像
信号処理回路。[Claims for Utility Model Registration] A video signal input terminal; a synchronization signal input terminal; a clamp circuit that clamps a video input signal supplied to the video signal input terminal with a clamp pulse during its blanking period; a sync separation circuit that separates a sync signal from an input signal; a switching circuit that switches and outputs an output signal of the sync separation circuit and an input signal from the sync signal input terminal; presence or absence of input to the sync signal input terminal; and a clamp pulse generation circuit that outputs a clamp pulse whose pulse start timing is switched to either the leading edge or the trailing edge of the synchronization signal to the clamp circuit in accordance with the invention. signal processing circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8090488U JPH024365U (en) | 1988-06-17 | 1988-06-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8090488U JPH024365U (en) | 1988-06-17 | 1988-06-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH024365U true JPH024365U (en) | 1990-01-11 |
Family
ID=31305717
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8090488U Pending JPH024365U (en) | 1988-06-17 | 1988-06-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH024365U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6417577A (en) * | 1987-07-13 | 1989-01-20 | Hitachi Ltd | Clamping circuit |
-
1988
- 1988-06-17 JP JP8090488U patent/JPH024365U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6417577A (en) * | 1987-07-13 | 1989-01-20 | Hitachi Ltd | Clamping circuit |
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