JPH0239449A - Inspection of wire bonding - Google Patents

Inspection of wire bonding

Info

Publication number
JPH0239449A
JPH0239449A JP63189027A JP18902788A JPH0239449A JP H0239449 A JPH0239449 A JP H0239449A JP 63189027 A JP63189027 A JP 63189027A JP 18902788 A JP18902788 A JP 18902788A JP H0239449 A JPH0239449 A JP H0239449A
Authority
JP
Japan
Prior art keywords
wire
slit
substrate
slit light
light
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63189027A
Other languages
Japanese (ja)
Inventor
Masayuki Seno
瀬野　眞透
Takao Naito
孝夫 内藤
Masaru Takahashi
賢 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP63189027A priority Critical patent/JPH0239449A/en
Publication of JPH0239449A publication Critical patent/JPH0239449A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/859—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector involving monitoring, e.g. feedback loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Wire Bonding (AREA)
  • Length Measuring Devices By Optical Means (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)

Abstract

PURPOSE:To easily detect a break of a wire after bonding by a method wherein slit light is directed onto a wire, while a substrate and slit light are relatively moved and the wire is scanned with a slit image is from the pick-up direction having a fixed tilt angle to the irradiation direction of the slit light. CONSTITUTION:Slit light 8 is directed onto a substrate 1, while this slit light 8 is moved in the arrow direction in order to scan a slit image 10a in the substrate 1, a slit image 10b in the electron parts 4 and a slit image 10c in a wire 7. The respective images 10a, 10b are picked up from the shifted positions directly proportional to the height of a part to be irradiated by the slit light to the same slit light 8 so that the height data of that part can be obtained according to an amount of positional shift. Accordingly, in case the wire 7 is broken, the height data H2 becomes discontinuous at a broken spot so that a break of the wire 7 can be detected by noticing the continuity of the height data H2 ranging the whole wire length.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は基板の電極と、この基板に装着された電子部品
の電極との間で行われるワイヤボンディングの検査方法
に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for inspecting wire bonding between an electrode of a substrate and an electrode of an electronic component mounted on the substrate.

従来の技術 第５図に示すように、基板５１の電極５２と、この基板
５１に装着した電子部品５３の電極５４とをワイヤ５５
を用いてボンディングすることは知られている。BACKGROUND OF THE INVENTION As shown in FIG.
It is known to perform bonding using.

又ボンディングに際して各電極５２．５４にワイヤ５５
が直接接続されるバンド５６を形成することも知られて
いる。Also, wires 55 are connected to each electrode 52 and 54 during bonding.
It is also known to form a band 56 to which are directly connected.

発明が解決しようとする課題 しかし従来では、ボンディング後にワイヤが断線してい
ないかどうか、又ワイヤが接続されたバンドが基板や電
子部品から剥離していないかどうかについては容易に検
査することができなかったこの理由は、第５図に示すよ
うに、例えば撮像手段で電子部品５３を撮像する場合、
小さい電子部品５３を拡大すると焦点深度が浅くなるた
め、高低差りの大きなワイヤ５５全体について焦点を合
わせることが困難であるからである。パッド５６の剥離
についても、撮像方向におけるパッド５６と基板や電子
部品との間の位置ズレが検出しにくいという問題がある
。Problems to be Solved by the Invention However, in the past, it has not been possible to easily inspect whether the wire is disconnected after bonding or whether the band to which the wire is connected has peeled off from the board or electronic component. The reason for this is that, as shown in FIG.
This is because when the small electronic component 53 is enlarged, the depth of focus becomes shallow, making it difficult to focus on the entire wire 55, which has a large difference in height. Regarding the peeling of the pad 56, there is also a problem in that it is difficult to detect a positional shift between the pad 56 and the board or electronic component in the imaging direction.

本発明は上記に鑑み、ボンディング後にワイヤが断線し
ていないかどうか（課題１）、ワイヤが接続されたパッ
ドが剥離していないかどうか（課題２）を容易に検出す
ることのできるワイヤボンディングの検査方法を提供す
ることを目的とするものである。In view of the above, the present invention provides a wire bonding method that can easily detect whether the wire is disconnected after bonding (Problem 1) and whether the pad to which the wire is connected has not peeled off (Problem 2). The purpose is to provide an inspection method.

課題を解決するための手段 請求項１記載の発明は課題１を解決するため、基板と、
この基板に装着された電子部品とをワイヤを用いてボン
ディングした後、ワイヤにスリット光を照射すると共に
基板とスリット光とを相対移動させ、スリット光の照射
方向に対し一定の傾斜角を持つ撮像方向からワイヤでの
スリット像をスキャンしてスリット像の位置データを得
、これら位置データがワイヤ全長にわたって連続してい
るか不連続であるかによってワイヤの断線を検出するこ
とを特徴とする 請求項２記載の発明は課題２を解決するため、基板の電
極と、この基板に装着された電子部品の電極とをワイヤ
を用いてボンディングした後、基板及び電子部品にスリ
ット光を照射すると共に基板とスリット光とを相対移動
させ、スリット光の照射方向に対し一定の傾斜角を持つ
撮像方向から基板及び電子部品でのスリット像をスキャ
ンしてスリット像の位置データを得、これら位置データ
が各電極の近傍において連続しているか不連続であるか
によって電極に形成されたパッドの剥離を検出すること
を特徴とする。Means for Solving the Problem In order to solve problem 1, the invention according to claim 1 includes a substrate;
After bonding the electronic components mounted on this board using a wire, the wire is irradiated with slit light and the board and slit light are moved relative to each other to capture an image with a constant inclination angle with respect to the irradiation direction of the slit light. Claim 2 characterized in that the slit image of the wire is scanned from the direction to obtain position data of the slit image, and wire breakage is detected based on whether the position data is continuous or discontinuous over the entire length of the wire. In order to solve problem 2, the invention described above bonds the electrodes of the substrate and the electrodes of the electronic components mounted on the substrate using wires, and then irradiates the substrate and the electronic components with slit light, and connects the substrate and the slits. The positional data of the slit image is obtained by scanning the slit image on the substrate and electronic components from an imaging direction that has a fixed angle of inclination with respect to the direction of irradiation of the slit light, and these positional data are used for each electrode. It is characterized by detecting peeling of pads formed on electrodes depending on whether they are continuous or discontinuous in the vicinity.

作　　　用 請求項１記載の発明によれば、ワイヤにスリット光を照
射すると共に基板とスリット光とを相対移動させ、スリ
ット光の照射方向に対し一定の傾斜角を持つ撮像方向か
らワイヤでのスリット像をスキャンすることにより、ワ
イヤ各部位の壜像方向での位置データを得ることができ
る。According to the invention described in claim 1, the wire is irradiated with slit light and the substrate and the slit light are moved relative to each other, and the slit with the wire is formed from an imaging direction that has a constant inclination angle with respect to the irradiation direction of the slit light. By scanning the image, position data of each portion of the wire in the direction of the bottle image can be obtained.

これら位置データが連続している場合、ワイヤは断線な
く連続している。位置データが不連続である場合がワイ
ヤが断線して断線箇所で不連続となっている。If these position data are continuous, the wire is continuous without any disconnection. If the position data is discontinuous, the wire is broken and the data is discontinuous at the broken point.

これにより、基板と電子部品とをボンディングするワイ
ヤの断線を検出することができる。This makes it possible to detect disconnection of the wire that bonds the board and the electronic component.

請求項２記載の発明によれば、基板及び電子部品にスリ
ット光を照射すると共に基板とスリット光とを相対移動
させ、スリット光の照射方向に対し一定の傾斜角を持つ
撮像方向から基板及び電子部品でのスリット像をスキャ
ンすることにより、基板及び電子部品の各部位における
位置データを得ることができる。According to the invention described in claim 2, the substrate and electronic components are irradiated with slit light, and the substrate and the slit light are moved relative to each other, so that the substrate and electronic components are irradiated with the slit light from an imaging direction that has a constant inclination angle with respect to the irradiation direction of the slit light. By scanning the slit image on the component, position data on each part of the board and electronic component can be obtained.

基板又は電子部品の各電極近傍での位置データとが連続
している場合はパッドが基板又は電子部品から剥離して
いない。不連続である場合はパッドが剥離している。If the position data near each electrode of the substrate or electronic component is continuous, the pad has not peeled off from the substrate or electronic component. If it is discontinuous, the pad has peeled off.

これにより、ワイヤが接続されたバンドの剥離を検出す
ることができる。This makes it possible to detect separation of the band to which the wire is connected.

実施例 本発明の実施例を、第１図ないし第４図に基き説明する
。Embodiment An embodiment of the present invention will be explained based on FIGS. 1 to 4.

第１図において、１は基板で、電極２の上にパッド３が
形成されている。４は電子部品１で、前記基板１に装着
されている。電子部品４の電極５の上にもパッド６が形
成されている。７は金線などからなるワイヤで、基板ｌ
のパッド３と電子部品４のパッド６との間でボンディン
グされている。In FIG. 1, reference numeral 1 denotes a substrate, on which pads 3 are formed on electrodes 2. In FIG. Reference numeral 4 denotes an electronic component 1, which is mounted on the substrate 1. A pad 6 is also formed on the electrode 5 of the electronic component 4. 7 is a wire made of gold wire etc., which is connected to the board l.
The pad 3 of the electronic component 4 is bonded to the pad 6 of the electronic component 4.

基板ｌの斜め上方に、この基板ｌにスリット光８を照射
する照射装置９を配設すると共に、基板１の上方に、第
２図働）に示すように、基板１でのスリット像１０ａ、
電子部品４でのスリット像１０ｂ、ワイヤ７でのスリッ
ト像１０ｃを撮像する撮像装置１１を配設している。ス
リット光８は撮像装置１１の撮像方向に対して、所定角
α傾斜している。照射装置９は、光源１２と光源１２か
らの光を平行光に屈折させるレンズ１３と、この平行光
を遮って前記スリット光８を形成するスリット１４を備
えたマスク１５とからなる。この照射装置９は矢印方向
に移動可能である。An irradiation device 9 for irradiating slit light 8 onto the substrate 1 is disposed obliquely above the substrate 1, and above the substrate 1, as shown in Figure 2, slit images 10a,
An imaging device 11 is provided to capture a slit image 10b of the electronic component 4 and a slit image 10c of the wire 7. The slit light 8 is inclined at a predetermined angle α with respect to the imaging direction of the imaging device 11. The irradiation device 9 includes a light source 12, a lens 13 that refracts the light from the light source 12 into parallel light, and a mask 15 having a slit 14 that blocks the parallel light and forms the slit light 8. This irradiation device 9 is movable in the direction of the arrow.

以上の構成において、基板１にスリット光８を照射する
と共にこのスリット光８を矢印方向に移動させ、基板１
でのスリット像１０ａ、電子部品４でのスリット像１０
ｂ１ワイヤ７でのスリット像１０Ｃをスキャンする。同
一のスリット光８に対し、各像１０ａ　、　１０ｂ　、
１０ｃは前記スリット光８が照射される部位の高さに正
比例して位置がズして撮像される。従って位置ズレ量に
より、その部位の高さデータを得ることができる。例え
ば、基板ｌの上面を基準面とすると、電子部品４の上面
の基準面からの高さデータＨ１は、電子部品４でのスリ
ット像１０ｂと基板１でのスリット像１０ａとの間の位
置ズレ量１．×ｃｏｔα、によって得ることができる。In the above configuration, the substrate 1 is irradiated with the slit light 8 and the slit light 8 is moved in the direction of the arrow,
Slit image 10a at electronic component 4, slit image 10 at electronic component 4
Scan the slit image 10C using the b1 wire 7. For the same slit light 8, each image 10a, 10b,
10c is imaged with its position shifted in direct proportion to the height of the region irradiated with the slit light 8. Therefore, the height data of that part can be obtained from the amount of positional deviation. For example, if the top surface of the substrate l is the reference surface, the height data H1 of the top surface of the electronic component 4 from the reference surface is the positional deviation between the slit image 10b on the electronic component 4 and the slit image 10a on the substrate 1. Amount 1. It can be obtained by ×cotα.

ワイヤ７でのスリット光８が照射された部位でのスリッ
ト像１０ｃの基準面からの高さデータＨ２は、ワイヤ７
でのスリット像１０ｃと基板１でのスリット像１０ａと
の間の位置ズレ量２□Ｘ　ｃｏｔα、によって得ること
ができる。The height data H2 from the reference plane of the slit image 10c at the part of the wire 7 that is irradiated with the slit light 8 is
It can be obtained by the positional deviation amount 2□X cotα between the slit image 10c on the substrate 1 and the slit image 10a on the substrate 1.

従ってワイヤ７全長にわたる高さデータＨ２の連続性に
着目することによって、第３図に示すようにワイヤ７が
断線している場合、断線箇所において前記高さデータＨ
２が不連続となる。これにより、ワイヤ７の断線を検出
することができる。Therefore, by focusing on the continuity of the height data H2 over the entire length of the wire 7, when the wire 7 is broken as shown in FIG.
2 becomes discontinuous. Thereby, disconnection of the wire 7 can be detected.

又ワイヤ７の両端部の高さデータＨ２と電子部品４の高
さデータＨＩとの間の連続性に着目すると、第４図に示
すように電子部品４のパッド６が剥離している場合、電
子部品４の電極５近傍において、両高さデータＨ１ｓ　
Ｈｚが不連続となる。これにより、パッド６の剥離を検
出することができる。Also, focusing on the continuity between the height data H2 of both ends of the wire 7 and the height data HI of the electronic component 4, if the pad 6 of the electronic component 4 is peeled off as shown in FIG. In the vicinity of the electrode 5 of the electronic component 4, both height data H1s
Hz becomes discontinuous. Thereby, peeling of the pad 6 can be detected.

本発明は上記実施例に示す外、種々の態様に構成するこ
とができる。The present invention can be configured in various ways other than those shown in the above embodiments.

例えば上記実施例ではスリット光を一方向からのみ照射
しているが、例えば２本のスリット像をクロスさせるよ
うに２方向からスリット光を照射し、撮像装置の分解能
を更に高めることができる。For example, in the above embodiment, the slit light is emitted from only one direction, but the resolution of the imaging device can be further improved by emitting the slit light from two directions, for example, so that the two slit images cross each other.

発明の効果 請求項１記載の発明によれば、ボンディング後のワイヤ
の断線を容易に検出することができる。Effects of the Invention According to the invention described in claim 1, it is possible to easily detect wire breakage after bonding.

請求項２記載の発明によれば、ワイヤが接続されたパッ
ドの基板又は電子部品からの剥離を容易に検出すること
ができる。According to the second aspect of the invention, it is possible to easily detect separation of a pad to which a wire is connected from a substrate or an electronic component.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明の実施例を示す全体側面図、第２図は要
部の拡大側面図（ａ）及び拡大平面図（ｂ）、第３図は
ワイヤが断線している場合の側面図、第４図はパッドが
剥離している場合の側面図、第５図は基板とこの基板に
装着された電子部品とをワイヤを用いてボンディングし
た状態を示す側面図である。 １・・・基板、２・・・電極、３・・・パッド、４・・
・電子部品、５・・・電極、６・・・バンド、７・・・
”ワイヤ、８・・・スリット光、　１０ａ、　１０ｂ、
　　１０ｃ・・・スリット像。 代理却鵡弁理士　粟野　１孝　はか１名第３図 第５図Fig. 1 is an overall side view showing an embodiment of the present invention, Fig. 2 is an enlarged side view (a) and an enlarged plan view (b) of main parts, and Fig. 3 is a side view when the wire is broken. , FIG. 4 is a side view showing a case where the pad is peeled off, and FIG. 5 is a side view showing a state in which a board and an electronic component mounted on the board are bonded using wires. 1...Substrate, 2...Electrode, 3...Pad, 4...
・Electronic components, 5...electrodes, 6...bands, 7...
"Wire, 8...Slit light, 10a, 10b,
10c...Slit image. Representative Patent Attorney Kazutaka Awano Figure 3 Figure 5

Claims (2)

【特許請求の範囲】[Claims] （１）基板と、この基板に装着された電子部品とをワイ
ヤを用いてボンディングした後、ワイヤにスリット光を
照射すると共に基板とスリット光とを相対移動させ、ス
リット光の照射方向に対し一定の傾斜角を待つ撮像方向
からワイヤでのスリット像をスキャンしてスリット像の
位置データを得、これら位置データがワイヤ全長にわた
って連続しているか不連続であるかによってワイヤの断
線を検出することを特徴とするワイヤボンディングの検
査方法。(1) After bonding the board and the electronic components mounted on this board using a wire, the wire is irradiated with slit light, and the board and slit light are moved relative to each other, so that the wire remains constant with respect to the irradiation direction of the slit light. The slit image on the wire is scanned from the imaging direction to obtain the positional data of the slit image, and wire breakage is detected based on whether this positional data is continuous or discontinuous over the entire length of the wire. Characteristic wire bonding inspection method. （２）基板の電極と、この基板に装着された電子部品の
電極とをワイヤを用いてボンディングした後、基板及び
電子部品にスリット光を照射すると共に基板とスリット
光とを相対移動させ、スリット光の照射方向に対し一定
の傾斜角を持つ撮像方向から基板及び電子部品でのスリ
ット像をスキャンしてスリット像の位置データを得、こ
れら位置データが各電極の近傍において連続しているか
不連続であるかによって電極に形成されたパッドの剥離
を検出することを特徴とするワイヤボンディングの検査
方法。(2) After bonding the electrodes of the substrate and the electrodes of the electronic components mounted on this substrate using wires, the substrate and the electronic components are irradiated with slit light, and the substrate and the slit light are moved relative to each other. The slit image on the board and electronic components is scanned from an imaging direction that has a certain inclination angle with respect to the light irradiation direction to obtain position data of the slit image, and whether this position data is continuous or discontinuous in the vicinity of each electrode. 1. A wire bonding inspection method characterized by detecting peeling of a pad formed on an electrode.
JP63189027A 1988-07-28 1988-07-28 Inspection of wire bonding Pending JPH0239449A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63189027A JPH0239449A (en) 1988-07-28 1988-07-28 Inspection of wire bonding

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63189027A JPH0239449A (en) 1988-07-28 1988-07-28 Inspection of wire bonding

Publications (1)

Publication Number Publication Date
JPH0239449A true JPH0239449A (en) 1990-02-08

Family

ID=16234071

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63189027A Pending JPH0239449A (en) 1988-07-28 1988-07-28 Inspection of wire bonding

Country Status (1)

Country Link
JP (1) JPH0239449A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59147206A (en) * 1983-02-14 1984-08-23 Fujitsu Ltd Object shape inspecting apparatus
JPS6131909A (en) * 1984-07-25 1986-02-14 Hitachi Ltd Detecting device for solid shape
JPS61260105A (en) * 1985-05-15 1986-11-18 Hitachi Ltd Method for detecting shape of bonding wire
JPS63144532A (en) * 1986-12-03 1988-06-16 ビユ−・エンジニアリング・インコ−ポレ−テツド Semiconductor device tester

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59147206A (en) * 1983-02-14 1984-08-23 Fujitsu Ltd Object shape inspecting apparatus
JPS6131909A (en) * 1984-07-25 1986-02-14 Hitachi Ltd Detecting device for solid shape
JPS61260105A (en) * 1985-05-15 1986-11-18 Hitachi Ltd Method for detecting shape of bonding wire
JPS63144532A (en) * 1986-12-03 1988-06-16 ビユ−・エンジニアリング・インコ−ポレ−テツド Semiconductor device tester

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