JPH023843A - Ic memory card - Google Patents

Abstract

PURPOSE:To accurately access data in all address areas and to obtain an inexpensive IC memory card by providing a switching signal generation circuit and accessing a substitution memory in place of a memory chip for a specified address. CONSTITUTION:When addresses inputted to the IC memory card, namely, a high rank address A1 and a low rank address A2 turn into the specified addresses corresponding to the fault of the memory chip 2A, the switching signal generation circuit 11 masks a memory switching signal E significant, outputs a substitution address A' and masks the fault of the specified address of the memory chip 2A. The memory switching signal E is inverted in an inverter circuit 12, is inputted to a chip selection circuit 3A so as to make all into a non-operation state, and selects a substitution memory 10 so as to make it in an operation state. The substitution address A' is inputted to the substitution memory 10 with a control signal C and reads accurate data D from the memory in the operation state. Thus, accurate data can be read without trouble even when the memory chip including the fault in a part is used.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an IC memory card used as a semiconductor memory element, and particularly relates to an inexpensive IC memory card using a memory chip containing a defect.

[Prior Art] FIG. 3 is a block diagram showing a conventional IC memory card described, for example, in the [IC Memory Card Guidelines] prepared by the Personal Computer Business Committee of the Japan Electronics Industry Emerging Association.

In the figure, the interface connector (1) is designed to be detachably connected to an external microcomputer, etc. (not shown).
) has a memory chip built into the IC memory card (
2> and a chip select circuit (3) are connected.

Further, the memory chip (2) is composed of a plurality of RAM'PROMs, and the chip select circuit (3) is composed of an IC.

The conventional IC memory card is configured as described above, and the chip select circuit (3) selects the selection control signal S based on the control signal C and the upper address ^1 inputted via the interface connector (1). is output and a predetermined memory chip (2) is selected. Then, data D is written or read into or from the selected memory chip (2) according to the lower address ^2.

Therefore, the memory chip (2) is connected to the CPU of the microcomputer connected to the interface connector (1).
) looks like a large-capacity memory chip.

As the memory chip (2), in the case of a RAM card, a 64 bit or 256 bit SRAM is used, and in the case of a ROM card, a 1M bit or 4M bit mask ROM is often used. Chip (2)
In recent years, the trend toward larger capacity has become stronger, and in the near future, 1Mbit SRAM and 16Mbit Mask R
There is a high possibility that OM will be adopted. However, during the manufacturing of such large capacity memory chips, so-called 1-bit failures occur by several percent, which is a major factor in lowering the manufacturing yield.

Therefore, in order to improve manufacturing yield, I
C manufacturers employ various methods to remedy 1-bit defects. However, since methods such as providing redundancy bits are only the greatest common denominator remedies, it is not possible to improve the quality of the product, and the current situation is that the IC ends up being discarded as a defective product. It is.

In this case, even if the defect rate of the memory IC to be discarded is 1%, if the total production volume is 10 million pieces/month, then 10
This means that 10,000 partially defective memories can be obtained per month. In particular, since SRAM memory chips are expensive, there is a growing demand for them to be used without being discarded even if a few bits are defective.

[Problems to be Solved by the Invention] As described above, conventional IC memory cards require the use of only perfectly good memory chips (2), which leads to poor manufacturing yields and problems during production. The problem was that even if a few bits were defective due to lack of margin, the memory chip had to be replaced with a perfectly good memory chip, making it extremely expensive.

This invention was made to solve the above-mentioned problems, and aims to provide an inexpensive IC memory card that can be used even if a memory chip has a slight defect such as a bit failure.

[Means for Solving the Problems] An IC memory card according to the present invention uses a memory chip that has a defect in a specific address, and has a completely non-defective substitute memory into which a substitute address corresponding to the specific address is input, and a memory chip with a defect in a specific address. A switching signal generating circuit is provided which generates a memory switching signal and an alternative address to put the memory chip in an inactive state and put an alternative memory in an active state when the switching signal is input.

[Operation] In this invention, when the address for data access is a specific address corresponding to a defect, an alternative memory is accessed in place of the memory chip containing the defect, and data can be written and read correctly for the entire IC memory card. Let's do it.

[Example] Hereinafter, an example of the present invention will be described with reference to the drawings. 1st
The figure is a block diagram showing one embodiment of the present invention.
), ^1, ^2, C, D and S are the same as above.

The memory chip (2^) is composed of, for example, a mask ROM containing a partially defective program. A chip select circuit (3^) that performs address decoding or chip selection is composed of an IC such as M7411C138P.

Alternative memory (built-in in parallel with memory chip (2^)
10) consists of a perfectly good programmable ROM (EPROM, OTP, etc.) with a memory capacity of IK bytes or less, and stores correct data in place of defective data at a specific address in the memory chip (2^). It has become.

A switching signal generating circuit (11), also called a memory address trap circuit, outputs a memory switching signal E and an alternative address A' when the input address indicates the above-mentioned specific address.

The inverter circuit (12) inverts the memory switching signal E and inputs it to the chip select circuit (3^).

FIG. 2 is a block diagram when the switching signal generation circuit (11) is constructed from a PLA, in which (lla) is an AND array section, and (llb) is an OR array section.

In this case, a specific address for trapping or masking defects included in the memory chip (2^) is programmed in the AND array section (lla), and the upper address^1 and lower address^2 are input. There is. An alternative memory (10
) is programmed with an alternative address 8' for
One of the output lines serves as a memory switching signal E.

Next, the operation of the embodiment of the present invention shown in FIGS. 1 and 2 will be described.

First, in the IC manufacturing test process, each memory chip (
Since the specific address of the defect included in 2^) is known, the specific address and the corresponding alternative address 8' are programmed into the switching signal generating circuit (11) in advance.

During normal data reading, the control signal C
In response to selection signal S, desired data D is read from a predetermined memory chip (2^) and sent to an external microcomputer via an interface connector (1).

Here, when the addresses input to the IC memory card, that is, the upper address ^1 and the lower address ^2, become specific addresses corresponding to a defect in the memory chip (2^), the switching signal generation circuit (11) switches the memory At the same time as making the signal E significant, the alternative address 8' is output, and the memory chip (
2^) Mask defects at specific addresses.

The memory switching signal E is inverted by the inverter circuit (12) and input to the chip select circuit (3^), which puts both the chip select circuit (3^) and the memory chip (2^) into a non-operating state, and one of them So, alternative memory (10)
is input to select the alternative memory (10) and put it into operation.

At the same time, the alternative address 8' is input to the alternative memory (10) together with the control signal C, and the alternative memory (10) is activated.
10). In this way, even if a partially defective memory chip (28) is used, the correct data D can be read out without any problem.

At this time, since the memory capacity of the alternative memory (10) is often less than IK bytes as described above, the capacity of the alternative memory (10) is several tens of thousands of bytes.
It is very inexpensive compared to a 00-byte memory chip (2A), and the added switching signal generation circuit (11) and inverter circuit (12) are also inexpensive elements. In addition, memory chips that contain defects and should originally be discarded2^),
This can be remedied through testing and screening, which does not require much expense, resulting in an inexpensive IC memory card as a whole. Especially in SR, where the memory chip (2^) is higher in unit cost than mask ROM.
In the case of a RAM card composed of AM, the cost reduction effect is remarkable.

In the above embodiment, the case where the defective memory chip (2^) is a mask ROM has been described, but it may be another ROM or RAM.

Further, when the memory chip (2^) is a RAM, it goes without saying that a good quality RAM is used as the substitute memory (10).

Furthermore, although the case where the data D is written to and read from the memory chip (2^) has been described, the same effect can be obtained even if the present invention is applied to the case where the memory chip (2^) stores software.

[Effects of the Invention] As described above, according to the present invention, a memory chip containing a defect in a specific address is used, and a perfectly good replacement memory is provided in which an alternative address corresponding to the specific address is input, and a memory chip in which a specific address is input is used. A switching signal generation circuit is provided which generates a memory switching signal and an alternative address to put the memory chip in a non-operating state and put an alternative memory into an operating state in case of a specific address. Since the data is accessed in the entire address area, data can be accessed correctly in all address areas, and an inexpensive IC memory card can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing the configuration of the switching signal generation circuit in FIG. 1, and FIG. 3 is a block diagram showing a conventional IC memory card. . (2^)...Memory chip (3^)...Chip select circuit (10)...Alternative memory (11)...Switching signal generation circuit A'...Alternative address D...Data E ...
Memory switching signal In the figures, the same reference numerals indicate the same or corresponding parts. A A look at A)) Also E ・Mef cut (・I 1981 procedural amendment 1986 7

Claims (1)

[Scope of Claims] An IC memory card comprising a plurality of memory chips and a chip select circuit that selects one of the memory chips according to an input address, wherein the memory chip has a defect at a specific address. a completely non-defective alternative memory into which an alternative address corresponding to the specific address is input; and when the specific address is input, the memory chip is rendered inactive and the alternative memory is activated. An IC characterized in that it is provided with a switching signal generation circuit that generates a memory switching signal and the alternative address for
Memory card.