JPH0236523A - Wafer alignment mark and formation thereof - Google Patents

Abstract

PURPOSE:To enable slit parts to be detected constantly as dark lines providing high edge contrast by a method wherein the edge parts of a wafer alignment mark are formed of slit parts and then a polysilicon film is formed on the alignment mark including the slit parts. CONSTITUTION:A substrate 65 to be underneath layer of an alignment mark, a thin film as a slit type alignment mark formation film e.g., a silicide film 66 4000Angstrom thick, a polysilicon film 68 to be deposited on the film 66, an etched film 69 and a resist film 70 are formed. In the background parts 71, alignment irradiating ray 73 enters vertically into the polysilicon film 68 to be reflected without scattering in the film 68. On the other hand, in the coverage parts 76 by the polysilicon film 68, the alignment irradiating ray 73 enters vertically into the polysilicon film 68 to be scattered in the film 68 extremely decreasing the reflected ray intensity. In this case, it is recommended that the polysilicon 68 is to be grained.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a wafer alignment mark used for alignment of a mask and a wafer in a photolithography process of a semiconductor device manufacturing process.

(Prior Art) Conventionally, as technologies in this type of field, there have been, for example, the following.

The configuration will be explained below using FIGS. 3 to 6.

Taking a typical convex alignment mark in the bright field alignment method as an example, as shown in FIG. In such a bright field alignment method, the alignment mark is illuminated with alignment illumination light 5, and the intensity of the alignment reflected light reflected in the specular direction, that is, the alignment profile shown in FIG. 3(b), is Detect mark position.

As shown in FIG. 3, in an ideal convex alignment mark, the alignment illumination light 5 is specularly reflected at the background part 1 and the alignment mark part 2, but
At the mark edge portion 3, the alignment illumination light 5 is diffusely reflected, and the intensity of the reflected light is reduced. Here, 8 is the reflected light at the mark edge portion.

For this reason, alignment is performed by detecting the edge contrast where the contrast lO1 between the background portion 1 and the mark edge portion 3 or the contrast 11 between the alignment mark portion 2 and the mark edge portion 3 is high. Therefore, in order to perform highly accurate alignment, it is necessary to obtain a narrow and large edge contrast.

However, in the actual process, as shown in FIG. 4, when a convex alignment mark is used, the photoresist 19 is spin-coded onto the film to be etched and the fourth The coating profile is as shown in Figure 4(a), and the reflectance due to optical interference changes depending on the resist film thickness, so as shown in Figure 4(b),
The alignment profiles of the background portion 1 and the alignment mark portion 2 are greatly undulated, resulting in a decrease in edge contrast.

Furthermore, due to variations in the film thickness of the substrate 15 on which marks are formed, the alignment mark 16, and the film to be etched 18,
Edge contrast may also be reduced.

In addition, as a method to remove the defects of the convex alignment mark and obtain high edge contrast, a thin and narrow slit 24 as shown in FIG. 5(a) is used instead of the mark edge part 3 of the convex alignment mark. One method is to use type alignment marks. In this method, as shown in FIG. 5(b), by diffusely reflecting the alignment illumination light 25 within the narrow slit 24,
The contrast 30 between the background portion 21 and the mark edge portion 3 is higher than the edge contrast of the convex alignment mark 36. Here, 21 is a background portion, 29 is light reflected within the slit, 35 is a substrate, and 37 is a resist.

In addition, in the case of a slit-type alignment mark, since there is no step like that of a convex-type alignment mark, the resist coating profile near the slit is flat, and the unevenness of reflectance depending on the resist film thickness is small.

(Problem to be Solved by the Invention) However, in the alignment mark described above, when a slit-type alignment mark is used in an actual process, the slit width becomes a narrow slit of 0.5 μm or less due to the resolution limit of photolithography. That's difficult.

Then, as shown in FIG. 6(a), a wide slit 4 is formed.
4, the reflected light 49 at the bottom of the slit is large, as shown in Fig. 6 (
Since the alignment profile is as shown in b), the effect of improving contrast due to diffused reflection within the slit cannot be expected much. Here, 41 is a background part, 45 is an alignment illumination light, 55 is a substrate, 56 is an alignment mark, 57 is a film to be etched, and 58 is a resist.

The present invention provides a wafer alignment mark and a method for forming the same that enable highly accurate alignment by eliminating the decrease in contrast caused by the small effect of slit internal diffuse reflection of the slit-type alignment mark described above and obtaining a higher contrast. The purpose is to provide

(Means for Solving the Problems) In order to solve the above-mentioned problems, the present invention provides a wafer alignment mark forming film provided on a substrate, a wafer alignment mark forming film provided on a substrate, A slit provided in a wafer alignment mark forming film and a polysilicon film formed thereon are provided so that the slit can be detected as a dark line.

Further, a method for forming a wafer alignment mark used in an alignment step in a semiconductor device manufacturing process includes a step of providing a wafer alignment mark forming film on a substrate, a step of forming a slit in the wafer alignment mark forming film, and a step of forming a slit on the wafer alignment mark forming film. A step of forming a polysilicon film is performed.

(Function) According to the present invention, as described above, the edge portion of the wafer alignment mark is formed with a slit, and a polysilicon film is formed on the alignment mark including the slit in a subsequent process, so that the slit is It is always detected as a dark line, and high edge contrast can be obtained.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a sectional view of a wafer alignment mark showing an embodiment of the present invention, and FIGS. 7 to 10 are diagrams explaining the principle of the wafer alignment mark of the present invention.

First, the principle of the wafer alignment mark of the present invention will be explained with reference to FIGS. 7 to 10.

As shown in FIG. 7, polysilicon consists of many minute grains 60, and when forming a film by deposition, each grain 60 has a grain boundary 61, and each grain 60 forms a film surface. A polysilicon film 62 is formed by growing perpendicularly to the polysilicon film 62. Here, a indicates the direction of grain growth. Because the polysilicon film has such a structure, as shown in FIG. 8, the incident light 63 that is perpendicular to the film surface is not affected much by the grains, so it is reflected without being scattered. However, as shown in FIG. 9, the incident light 6 incident parallel to the film surface
3 is reflected at grain boundaries 61 of individual grains of polysilicon, the incident light is scattered and the intensity of the reflected light becomes extremely low.

The wafer alignment mark according to the present invention utilizes this property of polysilicon to obtain a slit-type alignment mark.

2, a slit-type alignment mark as shown in FIG. 1θ is formed. That is, in the figure, 65
66 is a substrate serving as a base for an alignment mark, 66 is a three-layer film for forming a slit type alignment mark, 68 is a polysilicon film deposited thereon, 69 is a film to be etched, 70 is a resist film, and 71 is a background portion. ,7
3 is an alignment irradiation light, 74 is a background reflected light, 75 is a scattered light, and 76 is a slit portion covered by a polysilicon film.

Next, a specific structure of a wafer alignment mark showing an embodiment of the present invention will be described with reference to FIG.

This wafer alignment mark has a structure similar to that shown in FIG. 4,000 silicide films, 68 a polysilicon film deposited thereon, 69 a film to be etched, and 70 a resist film.

Having such a structure, the background portion 71
In this case, since the alignment illumination light 73 enters the polysilicon film 68 perpendicularly, it is reflected without being scattered within the film. Here, 74 is the reflected light. - On the other hand, alignment illumination light 7 is applied to the coverage area 76 due to the polysilicon film 6 days.
Since the light beam 3 is incident perpendicularly to the film surface of the polysilicon film 8, it is scattered within the film, and the intensity of the reflected light becomes considerably low. In this case, it is desirable that the polysilicon film 68 is a grain.

Hereinafter, the process of forming a wafer alignment mark according to the present invention will be explained with reference to FIG.

First, as shown in FIG. 2(a), a thin film 66 as a slit-type alignment mark forming film, for example, a silicide film with a thickness of 4000, is formed on a substrate 65.

Next, as shown in FIG. 2(b), anisotropic etching is performed on the Fj [film 66 by photolithography to create a width of 1.5 mm.
A narrow slit 67 of 1 μm or less, preferably 1 μm or less, is formed.

Then, the surface was vacuumed to 0.25 Torr for 5 ins.
As shown in FIG. 2(c), a polysilicon film 68 in the shape of a 3,000-layer film is grown to a thickness that fills the slit, for example, by thermal decomposition at 620° C. .

Note that when the growth temperature is 600°C or lower, the polysilicon film becomes amorphous, but at 900 to 1000°C
By annealing with , grains are formed.

Next, in the step of performing alignment using the wafer alignment mark, as shown in FIG. The resist 65 is spin-coded.

It goes without saying that in this alignment mark, the film to be etched 69 must be a transparent film such as an oxide film.

FIG. 11 is a process diagram for forming another wafer alignment mark according to the present invention.

First, as shown in FIG. 11(a), a thin film 81 as a slit type alignment mark forming film is formed on a substrate 80.

Next, as shown in FIG. 11(b), a thin slit pattern is formed in the thin film 81 by photolithography, and anisotropic etching is performed to form slits 82 in the thin film 81.

Next, as shown in FIG. 11(c), 2000 NSC films 83 are formed as intermediate films for protection.

Next, a polysilicon film 84 is deposited thereon as shown in FIG. 11(d).

Next, in the step of performing alignment using the wafer alignment mark, as shown in FIG. 11(d),
A film to be etched (for example, a BPSGI model) 85 is formed, and a resist 86 is further spin-coded thereon.

In the above embodiment, a two-slit wafer alignment mark is shown, but it goes without saying that a one-slit wafer alignment mark can also be used.

Further, as described above, it is desirable that the polysilicon be in the form of grains, but even if it is amorphous, the edge contrast can be improved more than in the conventional case.

Note that the present invention is not limited to the above embodiments,
Various modifications are possible based on the spirit of the present invention, and these are not excluded from the scope of the present invention.

(Effects of the Invention) As described above in detail, according to the present invention, the edge contrast is higher than that of conventional slit-type alignment marks, and highly accurate alignment can be performed.

In addition, in forming the alignment mark of the present invention, in the wafer process that includes the step of forming a slit and the subsequent step of forming a polysilicon film, there is no need to change the process, equipment, etc. from conventional ones, and the configuration thereof can be changed. It's easy.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a wafer alignment mark showing an embodiment of the present invention, FIG. 2 is a process diagram for forming a wafer alignment mark of the present invention, and FIGS. 3 to 6 are diagrams showing the configuration of a conventional wafer alignment mark. FIGS. 7 to 1θ are diagrams explaining the principle of the wafer alignment mark of the present invention, and FIG. 11 is a process diagram of forming another wafer alignment mark of the present invention. 65, 80... Substrate, 66, 81... Alignment mark forming film (Fjl film), 67, 82... Slit, 68.84... Polysilicon III, 69.85
...Film to be etched, 70.86...Resist, 8
3...NSC film (intermediate film). Patent applicant Oki Electric Industry Co., Ltd.

Claims (2)

[Claims] (1) In a wafer alignment mark used in an alignment step in a semiconductor device manufacturing process, (a) a wafer alignment mark forming film provided on a substrate, (b) a slit provided in the wafer alignment mark forming film, (c ) and a polysilicon film formed thereon.
d) A wafer alignment mark in which the slit can be detected as a dark line. (2) A method for forming a wafer alignment mark used in an alignment step in a semiconductor device manufacturing process, which includes: (a) providing a wafer alignment mark forming film on a substrate; and (b) forming a slit in the wafer alignment mark forming film. and (c) forming a polysilicon film thereon.