JPH0236012B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for controlling access to a storage key provided in a main storage device or the like of a computer system.

As management information for a storage area such as a main storage device of a computer system, a storage key is generally provided for each storage block in which the storage area is usually divided into fixed sizes.

As is well known, each storage key is generally divided into two parts, and the first part contains information for controlling access to the corresponding storage block, for example, a key and a read inhibit bit.

The second part of the storage key is information for controlling the replacement of storage blocks (so-called pages) when using a so-called virtual storage system, and consists of reference bits and change bits, for example.

Since at least one of these storage keys, particularly the second portion thereof, must be written every time the corresponding storage area is accessed, relatively high-speed access is required in terms of computer system performance.

[Conventional technology]

FIG. 2 is a block diagram showing an example of the configuration of a computer system.

The system is a storage controller (hereinafter referred to as MCU)
11, a main storage unit (MSU) 12, a central processing unit (CPU) 13, a channel control unit (CHP) 14, etc. are connected to the main storage unit (MSU) 11.

The MCU 11 receives a main memory access request from the central processing unit 13, channel control device 14, etc., and controls access to one of the main memory devices 12 by converting a specified main memory address as described below.

Also, access the key storage unit 16 using the specified main memory address and store it in the key storage unit 16.
The reference bit of the corresponding storage block is set to '1', and in the case of writing, the change bit is also set to '1'.

Each main storage device 12 is configured with physically divided storage function units in order to provide flexibility in configuration and enable multiple parallel accesses depending on the required storage capacity of the system. , each unit is called a storage segment, for example, each 8MB (megabyte) ~
With a size of approximately 32 MB, one main storage device can be configured with a required number of storage segments, for example up to four.

Each storage segment has consecutive storage addresses, but in order to increase the freedom of configuration,
The starting storage address of each storage segment can be set to a desired address.

For this purpose, in the MCU 11, for example, as shown in FIG.
-7 are provided, and the upper bits of the first storage address assigned to each storage segment are stored therein.

When processing main memory access requests issued from each device as described above, the MCU 11 sets a designated memory address in the register 21 after performing so-called interleaving processing, if necessary.

The selection circuit 22 selects a storage segment having a start storage address that matches, for example, the upper 4 bits of the storage address of the register 21, from registers 20-0 to 20-2.
By referring to 0-7 and determining the segment address, the segment address is output to the address line 23.

The segment address is used as an address to actually control the storage segment.

The address line 23 identifies one of the main memories 12 and one of the storage segments therein, and addresses within the storage segments are designated by the address line 24 which outputs the lower bits of the register 21, so that main memory 12 using the address of
access control can be performed.

On the other hand, access to the key storage unit 16 is necessary even when the main storage device 12 is not actually accessed, and requires relatively high speed as described above.

Furthermore, in the past, since the storage capacity of the main storage device was relatively small, a memory 25 was provided to hold a storage key corresponding to the maximum capacity of the main storage device of the system.
For example, the storage address designated by an access request from the central processing unit 13 or the like is directly used for access.

[Problem that the invention seeks to solve]

In recent years, as a configuration of a relatively large computer system, a configuration method as shown in FIG. 4 has become necessary.

In the system of FIG. 4, two systems having the same configuration as that of FIG. 2 are interconnected by an MCU 33.

The MCU 33 controls main memory access requests from the central processing unit 13, channel control unit 14, etc. connected to each other in the same manner as the MCU 11, and also assigns a specified storage address to the main memory 12 connected to the other MCU 33. If so, the access request information is transferred to the other MCU 33 via the control line 34, and the access is executed there.

In such a configuration, when the MCU 33 is provided with a conventional key storage section 35, the following problem occurs.

(a) A large amount of memory is required to hold the storage key.

(b) Since the memory keys of both MCUs 33 must be updated, the load of information transfer and processing between them increases, and control becomes complicated.

[Means for solving problems]

The above-mentioned problem includes a storage device, a storage control device, and a key storage unit, and the storage device is configured with a plurality of storage segments, and is connected to the storage control device, and each of the storage segments is composed of a plurality of memory blocks, each memory block has a storage area of a predetermined size, and the key storage section is composed of a plurality of key group areas, and each key group area corresponds to each of the memory segments. In response to this, a predetermined storage key corresponding to the storage block of the storage segment is held, and when accessing the key storage section, the storage control device selects the storage segment by a signal for selecting the storage segment. The storage key control method of the present invention is configured to select a key group area and select the storage key in the selected key group area by a signal for selecting the storage block in the storage segment. solved by.

[Effect]

That is, the memory that holds the storage key has a memory configuration that corresponds to the storage segment configuration of the main storage device.

With this configuration, access to (the memory of) the storage key is performed using segment addresses and intra-segment addresses determined in the same manner as in the main memory.

Therefore, each MCU 33 is equipped with only the memory of the storage key corresponding to the storage segment installed in the main storage device 12 connected to each MCU 33, and for one access, one MCU 33 is installed.
Only one person needs to perform the storage key access.

〔Example〕

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

The figure shows the configuration of a portion of the MCU 33 related to storage key access, and the same parts as in FIG. 3 are given the same reference numerals.

The MCU 33 processes the designated storage address of the access request, uses its high-order bits to identify whether or not it is the main storage connected to itself, and sets it in the register 21 if the address should be processed by itself.

The memory address of the register 21 is converted into a segment address by the selection circuit 22 in the same manner as described above, and is output to the address line 23.
4 is used for access control of the main storage device 12.

Further, according to the present invention, the segment address of the address line 23 is provided corresponding to the storage segment, and each selects one of the storage key memories 40-0 to 40-7 that holds a storage key group.

Selected memory key memory 40-0 to 40-7
The address of one storage key in one memory is specified by an address line 41. It is determined by the lower bit string of register 21.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, the memory capacity of a storage key in a large-scale computer system is reduced and the access load to the storage key is reduced, thereby significantly improving the economy and performance of the computer system. It has industrial effects.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the configuration of an embodiment of the present invention, FIG. 2 is a diagram showing an example of the configuration of a computer system, and FIG.
The figure is a block diagram of an example of the configuration of a conventional MCU, and FIG. 4 is a diagram showing another example of the configuration of a computer system. In the figure, 11 and 33 are MCU, 12 is main memory, and 13
is a central processing unit, 14 is a channel control device, 1
6 and 35 are key storage units, 20-0 to 20-7 are start address registers, 21 is a register, 22 is a selection circuit, and 25 and 40-0 to 40-7 are storage key memories.

Claims (1)

[Scope of Claims] 1. comprises a storage device, a storage control device, and a key storage unit, the storage device is configured by a plurality of storage segments and is connected to the storage control device, and each of the storage devices comprises: The segment consists of a plurality of storage blocks, each of which has a storage area of a predetermined size, and the key storage section has a plurality of key group areas 40-0 to 40-4.
0 to 7, each key group area holds a predetermined storage key corresponding to the storage block of the storage segment, respectively, and the storage control device holds the key storage key corresponding to the storage block of the storage segment. signal 23 for selecting the storage segment when accessing the storage segment;
20-0 to 20-7, which selects the key group area by the signal 41, and selects the storage key in the selected key group area by the signal 41, which selects the storage block in the storage segment; 21. A storage key control system characterized by being configured as follows.