JPH01140342A - Virtual computer system - Google Patents

Virtual computer system

Info

Publication number
JPH01140342A
JPH01140342A JP62300936A JP30093687A JPH01140342A JP H01140342 A JPH01140342 A JP H01140342A JP 62300936 A JP62300936 A JP 62300936A JP 30093687 A JP30093687 A JP 30093687A JP H01140342 A JPH01140342 A JP H01140342A
Authority
JP
Japan
Prior art keywords
virtual
register
allocation
real
configuration unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62300936A
Other languages
Japanese (ja)
Inventor
Yukio Ito
伊藤 行雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62300936A priority Critical patent/JPH01140342A/en
Publication of JPH01140342A publication Critical patent/JPH01140342A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To improve degree of freedom in the allocation of a real memory by making access to the configuration unit of a main memory device corresponding to a configuration unit number allocated to its own computer by a virtual computer and saving the change of allocation only by changing the allocation of the configuration unit of a virtual/real conversion table. CONSTITUTION:To the virtual/real conversion table 40, the configuration unit number which represents the configuration unit of the main memory device to which each virtual computer can make access is allocated. Therefore, each virtual computer can make access to the configuration unit of the main memory device 10 corresponding to its own computer, and it is enough to change the allocation of the configuration unit number of the virtual/real conversion table 40 in case of changing the allocation. In such a way, since it is no necessary to re-arrange the allocation for the whole in case of changing a part of the allocation of the real memory, the degree of freedom can be heightened.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、それぞれ識別番号を61与された複数の仮想
81算機を有し、各仮想計算機は自己専用のメモリ領域
をアクレスする仮想泪算磯システムに関する。
Detailed Description of the Invention [Field of Industrial Application] The present invention has a plurality of virtual machines each given an identification number of 61, and each virtual machine accesses its own dedicated memory area. Regarding the Saniso system.

〔従来の技術〕[Conventional technology]

従来、この種の仮想計算機システムは、仮想訂暉機が保
有する仮想アドレスを実メモリ上の実アドレスに変換す
る過程で、各仮想訓口磯ごとにあらかじめ決められた固
定値を仮想IFN5m上で生成した仮想アドレスに加え
る方法をとっている。
Conventionally, this type of virtual computer system converts a fixed value predetermined for each virtual address on the virtual IFN5m in the process of converting the virtual address held by the virtual corrector into a real address on real memory. The method is to add it to the generated virtual address.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の仮想計算機システムは、各仮想fl C
1機の専有するメモリ領域が必ず実メモリドで連続した
領域に割当てられる心髄があり、仮想X+篩機への実メ
モリの割付けを一部のみ変更する場合にも全体の割付け
を再度やり直さににければならないので、自由度が全く
ないという欠点がある。
In the conventional virtual computer system described above, each virtual fl C
The essence of this is that the memory area exclusive to one machine is always allocated to a contiguous real memory area, and even if only a portion of the real memory allocation to the virtual X + sieve machine is changed, the entire allocation must be redone. The disadvantage is that there is no degree of freedom at all.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の仮想計算機システムは、 構成単位で区切られた複数のメモリ領域を有し、各メモ
リ領域がそれぞれ構成単位番号を割当てられている主記
憶装置と、 実計尊機上で実行中の仮想計算機の識別番号を保持する
第1のレジスタと 前記実行中の仮想計算機がアクセスしようとする仮想ア
ドレスを保持する第2のレジスタと、第1のレジスタの
データと、第2のレジスタのデータの一部とを入力し、
入力したデータからなるエントリ番号によりそれぞれ検
索される構成単位番号保持領域を有する仮想/実変換テ
ーブルと、仮想/実変換テーブルの各構成単位番号保持
領域に主記憶装置の構成単位番号を格納し、格納さ・れ
た構成単位番号により、仮想計算機が、自己に割当てら
れた主記憶装置の構成単位をアクセスできるようにする
制御手段とを有する。
The virtual computer system of the present invention has a plurality of memory areas divided into constituent units, and each memory area is assigned a constituent unit number, and a virtual computer system running on a real machine. A first register that holds a computer identification number, a second register that holds a virtual address that the running virtual machine attempts to access, and one of the data in the first register and the data in the second register. Enter the part and
A virtual/actual conversion table having constituent unit number holding areas each searched by an entry number consisting of input data, and storing constituent unit numbers of the main storage device in each constituent unit number holding area of the virtual/actual conversion table; and a control means that allows the virtual machine to access the constituent unit of the main storage device allocated to the virtual machine based on the stored constituent unit number.

〔作用〕[Effect]

仮想/実変換テーブルに、各仮想計c9機がアクセスで
きる主記憶装置の構成中位を示す構成単位番号を割付け
ることにより、各仮想計算機は自己に割付けられた構成
単位番号に対応する主記憶装置の構成中位をアクセスで
き、割付けを変更する場合も仮想/実変換テーブルの構
成中位7R号の割付は変更だけで済む。
By assigning a configuration unit number indicating the middle configuration of the main storage device that each virtual machine can access to the virtual/real conversion table, each virtual machine can use the main memory corresponding to the configuration unit number assigned to itself. The middle part of the configuration of the device can be accessed, and even if the allocation is to be changed, it is only necessary to change the allocation of the middle part of the virtual/real conversion table No. 7R.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
Next, embodiments of the present invention will be described with reference to the drawings.

第1図は本発明の仮想計9111システムの一実施例を
示す構成図である。
FIG. 1 is a block diagram showing an embodiment of the virtual machine 9111 system of the present invention.

メモリ10は、4MBを1構成用位として、12構成単
位、つまり/I 8MBの容量を有し、各構成単位には
番号0.1.2.〜.11が振り当てられている主記憶
装置であり、テーブル40の設定に従って各構成単位が
選択され、選択された構成単位内の特定アドレスがレジ
スタ30のビットA2.A3.〜.A23で指定される
。レジスタ20はビット10.11の2ビツトで構成さ
れ実計算機上で実行中の仮想計算III識別番号0〜3
のいずれかを指示する。レジスタ30はAO,A1、〜
.A23の24ビツトで構成され、実行中の仮想it 
0機がメモリ10にアクセスする際の仮想アドレスを保
持する。テーブル40はレジスタ20のビットIO,1
1およびレジスタ30のビットAO,A1の4ビツトを
アドレスとして索引される仮想−実変換テーブルであっ
て16エントリを有し、エントリ0〜3が仮想πl専機
識別番号0、エントリ4〜7が仮想51韓機識別番号1
、エントリ8〜11が仮想Kl 93機番号2、エント
リ12〜15が仮想訓5機番号3の仮想π1算機に対応
している。各エントリ0.1.〜.15は対応するメモ
リ4内の構成単位が割付けられているかどうかを示す割
付ビット■と、割イ」けられている(■−“’1”)と
きには対応する構成単位番号0゜1.2.〜.11とを
保持している。
The memory 10 has a capacity of 12 configuration units, ie, /I 8MB, where each configuration unit is 4MB, and each configuration unit is numbered 0.1.2. ~. 11 is the main memory allocated to it, each constituent unit is selected according to the settings of the table 40, and a specific address within the selected constituent unit is stored in bits A2 . A3. ~. Specified by A23. The register 20 consists of 2 bits, bits 10 and 11, and is a virtual calculation III identification number 0 to 3 that is being executed on the real computer.
Instruct one of the following. The register 30 is AO, A1, ~
.. A running virtual IT consisting of 24 bits of A23
Holds the virtual address used when machine 0 accesses memory 10. Table 40 shows bit IO,1 of register 20.
This is a virtual-to-real conversion table that is indexed using addresses 1 and 4 bits AO and A1 of register 30, and has 16 entries. Entries 0 to 3 are virtual πl dedicated machine identification numbers 0, and entries 4 to 7 are Virtual 51 Korean aircraft identification number 1
, entries 8 to 11 correspond to the virtual Kl93 machine number 2, and entries 12 to 15 correspond to the virtual K1 machine number 3. Each entry 0.1. ~. 15 is an allocation bit (■) indicating whether the corresponding structural unit in the memory 4 is allocated or not, and when it is allocated (■ - "1"), the corresponding structural unit number 0゜1.2. ~. It holds 11.

次に本実施例の動作について説明する。Next, the operation of this embodiment will be explained.

表19表2は仮想計篩機番月0.1.2.3゜の仮想士
1n機にそれぞれメモリ10の構成単位番@0.1.2
.〜.11の構成単位がどのように割付けられているか
を示すものである。
Table 19 Table 2 shows the constituent unit number of memory 10 @0.1.2 for each virtual machine 1n machine with virtual machine number 0.1.2.3°.
.. ~. This shows how the 11 structural units are allocated.

本実施例では、1つの仮想計算機は最大16MBまでの
メモリ容量を有することができ、かつそのメモリ容量は
4MB単位で増減可能である。
In this embodiment, one virtual machine can have a memory capacity of up to 16 MB, and the memory capacity can be increased or decreased in units of 4 MB.

表1のように、仮想Ht W機識別番号0.1.2以上
の説明で述べられている仮想アドレスとは実アドレスに
アドレス変換流のもので、仮想計算機から見れば実アド
レスに相当する。
As shown in Table 1, the virtual address described in the explanation of virtual HtW machine identification number 0.1.2 and above is an address conversion type to a real address, and corresponds to a real address from the perspective of a virtual computer.

(発明の効果〕 以上説明したように本発明は、仮想/突変′@t−プル
に、各仮想tI算機がアクセスできる主記憶装置の構成
11位番号を割付けることにより、各仮想誼f3橢は自
己に割付けられた構成中位番号に対応する主記憶装置の
構成単位をアクセスでき、割イ」けを変更する場合も仮
想/実変換テーブルの構成単位番号の割付は変更だけで
斉むので実メモリの割イ」けの自由度が向上する効果が
ある。
(Effects of the Invention) As explained above, the present invention assigns to the virtual/sudden change'@t-pull the 11th number in the configuration of the main storage device that each virtual tI computer can access. f3 can access the configuration unit of the main storage device corresponding to the configuration medium number assigned to itself, and even when changing the allocation number, the allocation of the configuration unit number of the virtual/real conversion table can be changed simultaneously. This has the effect of increasing the degree of freedom in allocating real memory.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の仮想計算機システムの一実施例を示す
構成図である。 10・・・メモリ、 20.30・・・レジスタ、 40・・・テーブル。
FIG. 1 is a configuration diagram showing an embodiment of a virtual computer system of the present invention. 10...Memory, 20.30...Register, 40...Table.

Claims (1)

【特許請求の範囲】 それぞれ識別番号を付与された複数の仮想計算機を有し
、各仮想計算機は自己専用のメモリ領域をアクセスする
仮想計算機システムにおいて、構成単位で区切られた複
数のメモリ領域を有し、各メモリ領域がそれぞれ構成単
位番号を割当てられている主記憶装置と、 実計算機上で実行中の仮想計算機の識別番号を保持する
第1のレジスタと 前記実行中の仮想計算機がアクセスしようとする仮想ア
ドレスを保持する第2のレジスタと、第1のレジスタの
データと、第2のレジスタのデータの一部とを入力し、
入力したデータからなるエントリ番号によりそれぞれ検
索される構成単位番号保持領域を有する仮想/実変換テ
ーブルと、仮想/実変換テーブルの各構成単位番号保持
領域に主記憶装置の構成単位番号を格納し、格納された
構成単位番号により、仮想計算機が、自己に割当てられ
た主記憶装置の構成単位をアクセスできるようにする制
御手段とを有することを特徴とする仮想計算機システム
[Claims] A virtual computer system having a plurality of virtual machines each assigned an identification number and each virtual machine accessing its own memory area, which has a plurality of memory areas divided into constituent units. A main storage device to which each memory area is assigned a constituent unit number, a first register that holds the identification number of a virtual machine running on the real computer, and a register that holds the identification number of the virtual machine running on the real machine, and a register that the running virtual machine attempts to access. inputting a second register holding a virtual address to be stored, data in the first register, and part of the data in the second register;
A virtual/actual conversion table having constituent unit number holding areas each searched by an entry number consisting of input data, and storing constituent unit numbers of the main storage device in each constituent unit number holding area of the virtual/actual conversion table; 1. A virtual computer system comprising: a control unit that allows a virtual machine to access a configuration unit of a main storage device allocated to the virtual machine based on a stored configuration unit number.
JP62300936A 1987-11-27 1987-11-27 Virtual computer system Pending JPH01140342A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62300936A JPH01140342A (en) 1987-11-27 1987-11-27 Virtual computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62300936A JPH01140342A (en) 1987-11-27 1987-11-27 Virtual computer system

Publications (1)

Publication Number Publication Date
JPH01140342A true JPH01140342A (en) 1989-06-01

Family

ID=17890891

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62300936A Pending JPH01140342A (en) 1987-11-27 1987-11-27 Virtual computer system

Country Status (1)

Country Link
JP (1) JPH01140342A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7330955B2 (en) 2004-10-18 2008-02-12 Seagate Technology Llc Recovery record for updating a system configuration
US9049242B2 (en) 2005-06-22 2015-06-02 Seagate Technology Llc Atomic cache transactions in a distributed storage system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7330955B2 (en) 2004-10-18 2008-02-12 Seagate Technology Llc Recovery record for updating a system configuration
US9049242B2 (en) 2005-06-22 2015-06-02 Seagate Technology Llc Atomic cache transactions in a distributed storage system

Similar Documents

Publication Publication Date Title
US4511964A (en) Dynamic physical memory mapping and management of independent programming environments
JPS6027964A (en) Memory access control circuit
US4737909A (en) Cache memory address apparatus
US6564311B2 (en) Apparatus for translation between virtual and physical addresses using a virtual page number, a physical page number, a process identifier and a global bit
GB2165975A (en) Dynamically allocated local/global storage system
US4318175A (en) Addressing means for random access memory system
JPH01140342A (en) Virtual computer system
JP2000276405A (en) Address conversion device and computer system having this device
JPS5844263B2 (en) memory control circuit
US6742077B1 (en) System for accessing a memory comprising interleaved memory modules having different capacities
JPH1091527A (en) Storage device and storage medium
JP3456727B2 (en) Data processing device
JPH0244445A (en) Data processor
JPH0237443A (en) Main storage management system for electronic computer system
JP3349929B2 (en) Memory controller
JPH03137744A (en) Memory control system
JPS5953588B2 (en) Memory interleave control method
JPS6174040A (en) Address expansion method
JPS6349771Y2 (en)
JPS61147352A (en) Computer device
JPH0236012B2 (en)
JPH06309223A (en) Storage device with memory interleaving function
JPS61148548A (en) Memory access system
JPH037980B2 (en)
JPS62204361A (en) Access system for shared memory of multi-processor system