JPH0235467B2 - - Google Patents

Info

Publication number
JPH0235467B2
JPH0235467B2 JP57082810A JP8281082A JPH0235467B2 JP H0235467 B2 JPH0235467 B2 JP H0235467B2 JP 57082810 A JP57082810 A JP 57082810A JP 8281082 A JP8281082 A JP 8281082A JP H0235467 B2 JPH0235467 B2 JP H0235467B2
Authority
JP
Japan
Prior art keywords
package
plastic
film
metal
plastic package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57082810A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58199543A (ja
Inventor
Koichi Mase
Masayasu Abe
Masaharu Aoyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP57082810A priority Critical patent/JPS58199543A/ja
Publication of JPS58199543A publication Critical patent/JPS58199543A/ja
Publication of JPH0235467B2 publication Critical patent/JPH0235467B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP57082810A 1982-05-17 1982-05-17 半導体装置のパツケ−ジ Granted JPS58199543A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57082810A JPS58199543A (ja) 1982-05-17 1982-05-17 半導体装置のパツケ−ジ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57082810A JPS58199543A (ja) 1982-05-17 1982-05-17 半導体装置のパツケ−ジ

Publications (2)

Publication Number Publication Date
JPS58199543A JPS58199543A (ja) 1983-11-19
JPH0235467B2 true JPH0235467B2 (enrdf_load_stackoverflow) 1990-08-10

Family

ID=13784764

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57082810A Granted JPS58199543A (ja) 1982-05-17 1982-05-17 半導体装置のパツケ−ジ

Country Status (1)

Country Link
JP (1) JPS58199543A (enrdf_load_stackoverflow)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4633573A (en) * 1982-10-12 1987-01-06 Aegis, Inc. Microcircuit package and sealing method
JPS6212953U (enrdf_load_stackoverflow) * 1985-07-09 1987-01-26
JP2684387B2 (ja) * 1988-08-26 1997-12-03 株式会社半導体エネルギー研究所 電子装置およびその作製方法
US6756670B1 (en) 1988-08-26 2004-06-29 Semiconductor Energy Laboratory Co., Ltd. Electronic device and its manufacturing method
KR101007900B1 (ko) * 2005-03-23 2011-01-14 후지쯔 세미컨덕터 가부시키가이샤 반도체 장치 및 그 제조 방법
JP6418605B2 (ja) * 2015-07-31 2018-11-07 東芝メモリ株式会社 半導体装置および半導体装置の製造方法
JP6524003B2 (ja) * 2016-03-17 2019-06-05 東芝メモリ株式会社 半導体装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5223248U (enrdf_load_stackoverflow) * 1975-08-08 1977-02-18

Also Published As

Publication number Publication date
JPS58199543A (ja) 1983-11-19

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