JPH0233457U - - Google Patents
Info
- Publication number
- JPH0233457U JPH0233457U JP11180688U JP11180688U JPH0233457U JP H0233457 U JPH0233457 U JP H0233457U JP 11180688 U JP11180688 U JP 11180688U JP 11180688 U JP11180688 U JP 11180688U JP H0233457 U JPH0233457 U JP H0233457U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- circuit device
- diffusion layer
- wiring metal
- semiconductor integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009792 diffusion process Methods 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 claims description 4
- 239000013078 crystal Substances 0.000 claims description 2
- 239000000956 alloy Substances 0.000 claims 1
- 229910052710 silicon Inorganic materials 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
Landscapes
- Electrodes Of Semiconductors (AREA)
Description
第１図は本考案における半導体集積回路装置を
示す断面図、第２図および第３図はいずれも従来
例の配線金属と拡散層との接続における課題を説
明するための断面図である。
１４……拡散層、１６……配線金属、１８……
絶縁膜、２０……接続穴、２２……非単結晶層。
FIG. 1 is a cross-sectional view showing a semiconductor integrated circuit device according to the present invention, and FIGS. 2 and 3 are cross-sectional views for explaining problems in connection between a wiring metal and a diffusion layer in a conventional example. 14... Diffusion layer, 16... Wiring metal, 18...
Insulating film, 20... connection hole, 22... non-single crystal layer.
Claims (1)
合金材料からなる配線金属とが絶縁膜に設けた接
続穴を介して接続する半導体集積回路装置におい
て、前記配線金属と接する前記拡散層表面は非単
結晶層を有することを特徴とする半導体集積回路
装置。 In a semiconductor integrated circuit device in which a diffusion layer formed on a semiconductor substrate and a wiring metal made of an alloy material containing silicon are connected through a connection hole provided in an insulating film, the surface of the diffusion layer in contact with the wiring metal is a non-single crystal. A semiconductor integrated circuit device characterized by having a layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11180688U JPH0233457U (en) | 1988-08-26 | 1988-08-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11180688U JPH0233457U (en) | 1988-08-26 | 1988-08-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0233457U true JPH0233457U (en) | 1990-03-02 |
Family
ID=31350182
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11180688U Pending JPH0233457U (en) | 1988-08-26 | 1988-08-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0233457U (en) |
-
1988
- 1988-08-26 JP JP11180688U patent/JPH0233457U/ja active Pending
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