JPH0233427U - - Google Patents

Info

Publication number
JPH0233427U
JPH0233427U JP11122388U JP11122388U JPH0233427U JP H0233427 U JPH0233427 U JP H0233427U JP 11122388 U JP11122388 U JP 11122388U JP 11122388 U JP11122388 U JP 11122388U JP H0233427 U JPH0233427 U JP H0233427U
Authority
JP
Japan
Prior art keywords
semiconductor wafer
wafer
side wall
bottom end
holding jig
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11122388U
Other languages
Japanese (ja)
Other versions
JP2533551Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988111223U priority Critical patent/JP2533551Y2/en
Publication of JPH0233427U publication Critical patent/JPH0233427U/ja
Application granted granted Critical
Publication of JP2533551Y2 publication Critical patent/JP2533551Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の実施例に係る横形ボートを示
し、aが全体斜視図、bは横断面図、cは該ボー
トに刻設された保持溝の断面形状を示す要部断面
図である。dは説明図である。第3図は他の横形
ボートに適用される保持溝の断面形状を示す要部
断面図、第2図は縦型ボートに使用される保持溝
の断面形状を示す要部断面図、第4図は該保持溝
が刻設された縦型ボートを示す斜視図、第5図は
従来技術に係る保持溝の断面形状を示す要部断面
図である。 1:半導体ウエハ、w:肉厚、2A,2B,2
C:保持溝、3A,3B,3C:底面、d:底
面幅、4A,5A,4B,5B,4C,5C:側
壁、31,32:底端、41,52:開口端、5
1:変向部位、53:第1の面、54:第2の面
FIG. 1 shows a horizontal boat according to an embodiment of the present invention, in which a is an overall perspective view, b is a cross-sectional view, and c is a sectional view of a main part showing the cross-sectional shape of a retaining groove carved in the boat. . d is an explanatory diagram. Figure 3 is a cross-sectional view of the main part showing the cross-sectional shape of the retaining groove applied to other horizontal boats, Figure 2 is a cross-sectional view of the main part showing the cross-sectional shape of the retaining groove used in vertical boats, and Figure 4 5 is a perspective view showing a vertical boat in which the holding groove is carved, and FIG. 5 is a sectional view of a main part showing the cross-sectional shape of the holding groove according to the prior art. 1: semiconductor wafer, w: wall thickness, 2A, 2B, 2
C: Holding groove, 3A, 3B, 3C: Bottom surface, d 1 : Bottom width, 4A, 5A, 4B, 5B, 4C, 5C: Side wall, 31, 32: Bottom end, 41, 52: Open end, 5
1: direction change site, 53: first surface, 54: second surface.

Claims (1)

【実用新案登録請求の範囲】 (1) 単数又は複数点支持にて半導体ウエハの周
縁を保持する保持溝を有する半導体ウエハ保持治
具において、前記保持溝の少なくともウエハ周縁
と接触する部位における溝形状が、前記ウエハ肉
厚とほぼ同等か僅かに大なる底面幅をもつて形成
した底面両端より開口側に向け形成される一対の
側壁を有し、該一の側壁が前記底端より開口端側
に向け末拡がり状に伸びる傾斜側壁であり、又他
の側壁が前記底端より開口端側に向かう途中位置
において変向させた変向壁であり、該変向壁が、
底端位置より変向部位まで、ほぼ面接触状態でウ
エハを保持する第1の面と該変向部位より開口端
間をウエハとの対面間隔が徐々に離間する方向に
変化させた第2の面の組み合わせである事を特徴
とする半導体ウエハ保持治具。 (2) 前記他の側壁が、前記底端位置より半導体
ウエハと面接触する第1の面と、前記変向部位よ
りウエハとの対面間隔が徐々に離間する方向に変
化させた第2の面からなり、前記第2の面の最大
面深さが底面幅の1/5以上である請求項(1)記
載の半導体ウエハ保持治具。 (3) 前記傾斜側壁に半導体ウエハが面接触可能
に構成するとともに、前記他の側壁の底端より伸
びる第1の面が、半導体ウエハを嵌合可能に、傾
斜側壁と平行に形成した請求項(1)記載の半導体
ウエハ保持治具。
[Claims for Utility Model Registration] (1) In a semiconductor wafer holding jig having a holding groove that holds the periphery of a semiconductor wafer by supporting at one or more points, the shape of the groove in at least a portion of the holding groove that contacts the wafer periphery. has a pair of side walls formed toward the opening side from both ends of the bottom surface formed with a bottom width approximately equal to or slightly larger than the wafer thickness, and one side wall is located closer to the opening end than the bottom end. The other side wall is a deflection wall that is deflected at a position halfway toward the opening end from the bottom end, and the deflection wall is
A first surface that holds the wafer in almost surface contact from the bottom end position to the deflection section, and a second surface that holds the wafer in a direction in which the facing distance between the open end and the wafer is gradually spaced apart from the deflection section. A semiconductor wafer holding jig characterized by a combination of surfaces. (2) The other side wall has a first surface that is in surface contact with the semiconductor wafer from the bottom end position, and a second surface that is changed in a direction in which the facing distance with the wafer is gradually separated from the direction changing portion. The semiconductor wafer holding jig according to claim 1, wherein the maximum surface depth of the second surface is 1/5 or more of the bottom width. (3) A semiconductor wafer is configured to be able to make surface contact with the inclined side wall, and a first surface extending from the bottom end of the other side wall is formed parallel to the inclined side wall so that the semiconductor wafer can be fitted therein. The semiconductor wafer holding jig described in (1).
JP1988111223U 1988-08-26 1988-08-26 Semiconductor wafer holding jig Expired - Lifetime JP2533551Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988111223U JP2533551Y2 (en) 1988-08-26 1988-08-26 Semiconductor wafer holding jig

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988111223U JP2533551Y2 (en) 1988-08-26 1988-08-26 Semiconductor wafer holding jig

Publications (2)

Publication Number Publication Date
JPH0233427U true JPH0233427U (en) 1990-03-02
JP2533551Y2 JP2533551Y2 (en) 1997-04-23

Family

ID=31349086

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988111223U Expired - Lifetime JP2533551Y2 (en) 1988-08-26 1988-08-26 Semiconductor wafer holding jig

Country Status (1)

Country Link
JP (1) JP2533551Y2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS516664A (en) * 1974-07-05 1976-01-20 Hitachi Ltd ITAJOBUTSUSHIJIJIGU
JPS51161071U (en) * 1975-06-16 1976-12-22
JPS62201928U (en) * 1986-06-13 1987-12-23

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS516664A (en) * 1974-07-05 1976-01-20 Hitachi Ltd ITAJOBUTSUSHIJIJIGU
JPS51161071U (en) * 1975-06-16 1976-12-22
JPS62201928U (en) * 1986-06-13 1987-12-23

Also Published As

Publication number Publication date
JP2533551Y2 (en) 1997-04-23

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