JPH02306650A - Semiconductor device - Google Patents

Abstract

PURPOSE:To contrive the adaptation to the design of an IC having a lot of pins and a few gates by composing an input and output interface cell out of two pads, two input cells and one output cell. CONSTITUTION:A semiconductor device previously comprising an interface input and output circuit 2 with an external part as a master is composed of adjacent two pads 1, two input interface circuits 4 according to said pads 1, and one output interface circuit 3 which can be connected through any of two pads 1. Accordingly, an increase in number of pads becomes possible without changing the areas of an input interface circuit part 4 and an output interface circuit part 3 in the interface cell part of an IC. Then, it can be contrived to reduce the area of a chip or an IC having a lot of pins and a few gates.

Description

[Detailed description of the invention]

[Industrial Field of Application] The present invention relates to a semiconductor device, and particularly to a master slice semiconductor device having input/output cells and the like as masters in advance. [Prior Art] A conventional semiconductor device that has an input/output interface cell as a master has one input cell and one output cell for each band, and at the CAD design stage, it is determined whether it is an input cell or an output cell. The configuration was such that wiring could be used to determine whether the cell was a cell or an input/output cell. FIG. 2 is a layout diagram when a conventional input/output interface cell is arranged as a master of a chip. For explanation,
The areas of the input interface cell section and the output interface cell section on the drawing are indicated. The total number of pads is 32. [Problem to be solved by the invention 1 However, after defining inputs, outputs, and input/outputs at the CAD design stage, except when setting input/output terminals, when setting input terminals, the output circuit section At the time of setup, each input circuit section was placed and designed in an unused state. In other words, when setting the input and output terminals on an l chip,
Nearly half of the area of the interface cell within the chip remains on the pattern as an unused area, and as the area of a single interface cell increases, the limit on the number of pads that can be secured within the chip becomes stricter.
This was an obstacle to responding to such issues. Therefore, one aspect of the present invention is that it is possible to switch between an input interface, an output interface, and an input/output interface by simply adding wiring using CAD design, as in the conventional case, and is suitable for designing ICs with a large number of pins and a small number of games.

[Means to solve the problem]

The semiconductor device of the present invention includes two adjacent pads and two corresponding input interface circuits in a semiconductor device that has an external interface input/output circuit as a master in advance.
It is characterized by consisting of one output interface circuit that can be connected from either of the pads. [Embodiment J] An embodiment of the present invention will be described below based on the drawings. Figure 1 shows the layout configuration of a semiconductor device according to the present invention. In Figure 1, 1 is a pad section that connects the input, output, and input/output of the chip to the lead frame of the IC package using bonding wires. 2 in the figure is a pad section adjacent to 1. 3 in the figure is a circuit that interfaces the output signal inside the IC with the outside of the IC, adjusts the drive ability, and outputs it to the outside of the IC. A 9.10 terminal is added so that it can be connected to both. If pad l is used as an output, connect the wires from 9 to l and 2, and if pad 2 is used as output, connect the wires from 10 to l and 2 respectively. 5 is an input circuit that interfaces with the outside of the IC. 5 in the figure is an input circuit that interfaces with the outside of the IC when the pad 2 is used as an input. 6 in the figure is the wiring for guiding the signal from inside the IC to 3 in order to interface the output signal inside the chip with 3 to the outside of the IC and to output it to the outside of the IC by 2.0 7 in the figure is the wiring that connects pads 2 and 5 in order to interface the signal from the outside of the IC with 5 from pad 2 0 8 in the figure is 7, similarly the signal from the outside of the IC is interfaced with 4 from pad l 9 in Figure 0, which is the wiring connecting pads l and 4, is
The output signal from inside the IC is interfaced by 3,
6 is a terminal that connects pads 1 and 3 only when adjusting the drive capacity and using pad 1 as an output. Similarly to 9, 10 is a terminal that connects pads 1 and 3 from inside the IC by 3 to interface and drive the output signal from inside the IC. It is a terminal that adjusts the capacity and connects pads 2 and 3 only when pad 2 is used as an output. through I
It is input into C. In this case, in CAD, 11. and IC
Connect C internal circuit. 12 too. 13.1 in Figure 0 used for connection with the inside of the IC in the same way as 11
Reference numeral 4 denotes a control signal connection when either 1 or 2 is used as a tri-state output or input/output circuit. FIG. 3 shows a semiconductor device of the present invention, in which the input/output interface cells shown in FIG. 1 are arranged. The area of each interface cell part is the same size, and a total of 48 pads can be arranged. [Effects of the Invention] As described above, the present invention has a configuration of two input interface cells and one output interface cell using two pads, so that the IC interface can be adjusted as shown in FIGS. 2 and 3. It becomes possible to increase the number of pads from the conventional 32 to 48 without changing the area of the input interface circuit section and the output interface circuit section in the cell section. This makes it possible to create an IC with many pins and few gates, and to reduce the chip area.

[Brief explanation of drawings]

FIG. 1 is a diagram illustrating the arrangement of an input/output interface cell including a pad portion, which is a semiconductor device of the present invention, within an IC chip. FIG. 2 is a layout diagram when a conventional input/output interface cell is arranged as a master chip. Third
The figure is a diagram of a semiconductor device of the present invention. l... Pad section 2... Pad section 3... Output circuit section 4... Input circuit section 5... Input circuit section

Claims (1)

[Claims] A semiconductor device that has an input/output interface cell as a master in advance for interfacing with the outside, and has two input/output interface cells.
1. A semiconductor device comprising: pads, two input cells, and one output cell.