JPH0230571B2 - HANDOTAISOCHI - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to semiconductor devices, particularly MOS integrated circuit devices.

MOS integrated circuit devices are becoming more highly integrated and have higher performance year by year, and the elements formed inside semiconductor substrates (wafers) tend to be smaller. On the other hand, as elements become smaller and more highly integrated, contact parts that connect silicon substrates and aluminum electrodes
The number of contacts is increasing, and the characteristics of these contacts are playing a major role in determining product performance and yield. In order to investigate the characteristics of such important aluminum electrode contacts during manufacturing and in products, conventionally a test transistor was formed separately from the internal elements in the pellet, and the test transistor was The characteristics of the aluminum electrode part were investigated and the results were fed back to the conditions for forming the contact part of the MOS integrated circuit device that was subsequently formed. However, this method only estimates the average contact quality of the many aluminum electrodes in internal elements, and cannot adequately handle product devices with various aluminum electrode structures, resulting in poor product yield. There was a limit to how much it could be improved.

An object of the present invention is to improve the shortcomings of conventional test elements with respect to contact characteristics of aluminum electrode parts of internal elements, and to provide a test element that can serve as a highly accurate guide to further improve product yield. To provide semiconductor devices.

The semiconductor device of the present invention includes a part of a semiconductor substrate on which elements such as transistors and integrated circuits are formed.
It has a configuration in which test elements such as a plurality of transistors or diodes having aluminum electrodes are formed with various ratios of contact area to aluminum area.

Next, the present invention will be explained by examples.

FIG. 1a is a partial plan view of a test element according to an embodiment of the present invention, and FIG. 1b is a sectional view taken along line AA in FIG. In these figures, 1a and 1b are N
An internal element (not shown) is provided on a part of the type semiconductor substrate 11.
This is a test MOS transistor element formed separately from the transistor element 1a.
It includes a source region 12, a drain region 13, a gate electrode 14, and a source electrode 4 and a drain electrode 5 made of aluminum. Further, the transistor element 1b includes a P-type source region 22, a drain region 23,
It includes a gate electrode 24, and further includes an aluminum source electrode 6 and a drain electrode 7, respectively. Note that 3 is an insulating surface oxide film.

In the test MOS transistor elements 1a and 1b, the source and drain electrodes 6 and 7 of the element 1a are made of aluminum with the same area, but are connected through an opening (contact region) made in the oxide film 3. The contact areas contacting the source and drain regions are different. That is, the contact area of element 1a is formed to be much smaller than that of element 1b. Therefore, we measured the electrical characteristics of this test element and comprehensively investigated these contact characteristics when the product yield was the best, so that we could obtain the corresponding characteristic values of the test element at this time. By controlling the temperature and time of contact formation by feeding back to the conditions for forming the contact portion of the semiconductor device to be formed subsequently, it is possible to improve the yield of products having aluminum electrodes of various shapes.

In the above example, there were only two types of test elements, but this was replaced by elements 1a, 1b, ... 1e, each having five types of aluminum electrodes with different ratios of contact area to aluminum area. Form this 5
Using various types of test elements, we comprehensively evaluate their characteristics to find the contact formation conditions that will give the best product yield, and then apply these conditions as feedback to the contact formation in the product equipment that will be formed later. By confirming that the characteristics of the test device obtained are similar to those in the case where the product yield is the best, and proceeding with the manufacturing process, the highest product yield will always be obtained. If five types of test elements are prepared in this way compared to the two types of test elements shown in Figure 1, the relationship between the yield of products with aluminum electrodes of many shapes and types and the overall characteristics of the test elements will be improved. This provides a clear monitoring system for obtaining accurate high product yields.

FIGS. 2a and 2b are a plan view and a sectional view taken along line AA of another embodiment of the present invention in which a diode element is formed as a test element, respectively. 11 is an N-type semiconductor substrate, and 2a and 2b are diode elements for testing. Aluminum anode electrode 8 in contact with anode region 15 of diode element 2a
The contact area is smaller than that of the aluminum anode electrode 9 that contacts the anode region 16 of the diode element 2b, and the characteristics of the ratio of these two different types of contact area to aluminum area are made to correspond to the characteristics of product yield. The fact that a guideline for the maximum yield conditions can be obtained from the characteristics of the test device that gives the highest yield characteristics is that
This is similar to the example in FIG. Further, as in the case of the first embodiment, a more accurate monitoring system can be obtained by increasing the number of test elements.

[Brief explanation of drawings]

FIGS. 1a and 1b are a plan view and an AA sectional view thereof of a test MOS transistor according to one embodiment of the present invention, and FIGS. 2a and 2b are respectively a test MOS transistor according to another embodiment of the present invention. FIG. 2 is a plan view of a diode and a cross-sectional view thereof taken along line AA. 1a, 1b... MOS transistor element for testing, 2a, 2b... diode element for testing, 3
...Surface oxide film, 4,6...Aluminum source electrode,
5, 7... Aluminum drain electrode, 8, 9... Aluminum anode electrode, 11... N-type silicon substrate, 1
2, 22...P type source region, 13, 23...P
type drain region, 14, 24... gate electrode, 1
5, 16...P-type anode region.

Claims (1)

[Claims] 1. First and second test elements are provided close to each other on a part of a semiconductor substrate on which elements such as transistors and integrated circuits are formed, and each of the first and second test elements An impurity region formed in a semiconductor substrate is connected to the impurity region with a predetermined contact area and is not electrically connected to anything other than the impurity region, and has an island shape on the semiconductor substrate. an aluminum electrode formed on the semiconductor substrate, the aluminum electrode of the first test element and the aluminum electrode of the second test element having the same size; A semiconductor device formed in parallel, and wherein the contact area of the first test element and the contact area of the second test element have different sizes.