JPH02305468A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a high speed element high in resistance to latch-up by a method wherein a well under a field oxide film is decreased to a proper value in concentration by a first ion implantation into the well and the high concentration region of a retrograde well is formed deeper through a second ion implantation. CONSTITUTION:A first ion implantation process in which a well 4a under a field oxide film 2 is decreased to a proper value in concentration, a second ion implantation process in which a region 3 deeper than the well 4a is enhanced in concentration, a third ion implantation process in which a region 6 shallower than the first implantation depth is increased in concentration, and a fourth ion implantation process in which an intermediate region 5 located at an intermediate depth between the implantation depths of the first and the second ion implantation is increased in concentration are included. That is, the well 4a under the field oxide film 2 is decreased to a proper value in concentration by the first ion implantation, and a high concentration region 3 of a retrograde well base is formed deep in a board through the second ion implantation. By this setup, not only a junction capacitance can be made small but also a parasitic bipolar transistor can be made small in amplification factor, so that an high speed element high in resistance to latch-up can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for forming a retrograde well having a high concentration region at the bottom of the well.

[Conventional technology]

In the semiconductor device 1 integrated with MO3 type transistors, N
A CMO3 type semiconductor device constructed by combining both MO3 type or PMO3 type O3 transistors is widely sought after due to its advantages such as low power consumption, rather than a circuit consisting only of MO3 type or PMO3 type O3 transistors. NMO3 type O3 resistor and PM
In a CMO3 type configuration in which O3 type O3 transistors exist in each well on the same substrate, a parasitic bipolar transistor is inevitably created, and a current so large that the device is destroyed due to noise on the power supply line etc. There was a problem in that so-called latch-up occurred. However, in a retrograde well having a high concentration region at the bottom of the well, the amplification factor of the parasitic bipolar transistor can be lowered, and latch-up can be significantly reduced.

Figure 3 shows a conventional retrograde well process realized using high-energy ion implantation.

In this method, as shown in FIG. 3(a), the usual LOCO3 method (LOCal Oxida
A field oxide film 2 is formed on a silicon substrate 1 by patterning a nitride film on an underlying oxide film and using this as a mask to oxidize the substrate. Define region 7. Here, the underlying oxide film 2 with a thickness of about 300 mm remains on the active region 7.

Next, as shown in FIG. 3(b), in order to form the high concentration region 4 at the bottom of the retrograde well, the voltage was set at 200 keV for boron (Bl) and 600 keV for rif (P'') (7).
5×10′z~5X IQ” at high energy of eV
A high concentration region 4 is formed by ion implantation with an implantation amount of about 1.5 cr". The impurity concentration of the region 4 at this time is as shown in
See b). Here, this high concentration region 4 is simultaneously implanted so as to be directly under the field oxide film 2 (4a), and if there is no high concentration region here, the voltage will be applied to the wiring material deposited on the field oxide film 2. This is to prevent the underside of the field oxide film 2 from being easily inverted to another conductivity type due to the applied voltage, thereby making isolation from adjacent elements impossible. Therefore, the high concentration region 4 is normally 200 k e V as described above so as to extend directly below the field oxide film 2 (4a).

It is formed by implantation with an energy exceeding 600 keV, and therefore the depth of the high concentration region 4 below the active region 7 is determined by the thickness of the field oxide film 2, which determines this energy. The impurity concentration of the region 4a at this time is shown in FIG.
Please refer to a).

Next, in the step of FIG. 3(C), the area (b) below the active region 7 is
In order to make the concentration of the shallow region 6 up to the high concentration region 4 formed in step (b) appropriate, ions of the same type as the ions implanted in step (b) were implanted at 100 keV in the case of poron (B1).

In the case of phosphorus (B2), one or more implants are performed at a lower energy, such as 200 keV. 11 m at this time
For the impurity concentration in region 6, see FIG. 4, etc.). Further, the amount of ion implantation at this time is appropriately set according to the number of times of implantation and the energy, so that the impurity concentration in the region 6 shown in FIG. 4(b) is obtained as a result.

Subsequently, in the step of FIG. 3(d), the silicon substrate 1 is annealed to activate the impurities implanted in the previous steps of (b) and (C).

As described above, FIG. 4(a) shows the impurity concentration profile of the region 4a under the field oxide film 2 when processed based on FIG. 3, and FIG. 4(c) shows the active region in the same case. 7 shows the impurity concentration profile of regions 6 and 4a below 7.

[Problem to be solved by the invention]

Since the conventional retrograde well forming process was performed as described above, the high concentration point at the bottom of the retrograde well was determined by the field oxide film thickness. In recent years, as the miniaturization of semiconductor devices has progressed, field oxide films have become thinner in order to reduce the penetration of the field oxide film into the active region, the so-called bird's beak. In devices, the depth of the high concentration region under the active region is becoming shallower, making it difficult for the depletion layer between the element and the retrograde well in the active region to grow.
There was a problem in that the junction capacitance increased and the speed of the device decreased.

The present invention has been made to solve the above-mentioned problems. It has a high concentration region deep at the bottom of the well, making it possible to realize a retrograde well that is more resistant to latch-up than conventional wells. The purpose of this invention is to obtain a method for manufacturing a semiconductor device that can realize an element.

[Means to solve the problem]

The method for manufacturing a semiconductor device according to the present invention reduces the amount of ions implanted under the field oxide film, which was conventionally unnecessarily high concentration, to an appropriate amount in the first ion implantation.
By the second ion implantation, the high concentration region unique to retrograde wells is formed deeper.

[Effect]

In this invention, by lowering the implantation amount under the field oxide film, the junction capacitance is lowered and a high-speed device can be realized, and the amplification factor of the parasitic bipolar transistor can be increased by forming a deeper high concentration region. By lowering the resistance, it is possible to form an element that is more resistant to latch-up.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a process for forming a retrograde well according to an embodiment of the present invention, and the manufacturing method will be described below.

In FIG. 1(a), a normal Loc is used for element isolation.
A field oxide film 2 is formed on a silicon substrate 1 by the OS method.
form.

Next, as shown in FIG. 4B, in order to prevent the portion (4a) under the field oxide film from easily inverting, an impurity layer 4 is formed by high-energy implantation of 200 keV or more than 600 keV as described above. The amount of implantation at this time may be such that the voltage applied to the wiring material deposited on the field oxide film 2 brings the potential to an appropriate potential that is not so high that an inversion layer is formed under the field oxide M2. , do not require conventional high concentrations. That is, as shown in FIG. 2(a), the concentration 4a directly under the field oxide film 2 is 5X 10"c++-3 (I E
17), it may be I x 10 "cm-'. This allows the junction capacitance to be lower than that of the conventional retrograde well. The ion implantation amount at this time is the same as that of the region 4a shown in FIG. 2(a). Adjust as appropriate to obtain a concentration of .

Next, in order to form the high concentration region 3 at the bottom, which is unique to retrograde wells, the voltage was set at 2 MeV in the case of B.

In the case of Po, ions are implanted to a depth of about 2 to 4 μm at high energy such as 3 MeV to form the high concentration region 3.

The impurity concentration of the high concentration region 3 at this time is as shown in FIG. 2(a).
2(b), and the ion implantation amount is appropriately set so as to obtain the concentration in region 3 shown in FIGS. 2(a) and 2(b).

Next, as shown in FIG. 1C, the impurity concentration in the region 6 shallower than the impurity injection layer 4 is increased. 200 in case of B
One or more low energy implantations (third ion implantation) of keV or less, 600 keV or less in the case of P3 are performed, and the region (intermediate region) 5 between the impurity implantation N4 and the high concentration region 3 is implanted. Increase concentration. Case 2 of B.
00keV or more, 2MeV or less, 600ke for P9
Ion implantation is performed once or multiple times (fourth ion implantation) with an energy of V or more and 3 MeV or less.

The ion implantation amounts in the third and fourth ion implantations are set appropriately depending on the number of implantations and the energy, and as a result, the area 6 shown in FIGS. 2(a) and 2(b)
．． An impurity concentration of 5 is obtained.

Subsequently, in the process shown in FIG. 10(d), an annealing treatment is performed to activate the injection layer that was performed in FIG.

As mentioned above, FIG. 2(a) shows the region 4 under the field oxide film 2 of the silicon substrate 1 processed according to FIG.
a, shows the impurity concentration profile of 5.3, and the same figure (b
) shows the impurity concentration profile of regions 6.4 and 5.3 below the active region 7 in the same case.

It can be seen from these figures that a deeper well is formed compared to the conventional method shown in FIG.

Note that in the above embodiment, annealing was performed to activate the impurity after the implantation was completed, but this annealing step was omitted because activation was performed through heat treatment in a post-process, typically for source/drain drive. Good too.

In addition, if the annealing process is omitted, if the channel implantation of the MO3 type transistor formed in the active region is performed successively after the implantation for forming the retrograde well, the well photolithography process and the channel injection photolithography process can be merged (commoned), and the period for forming semiconductor devices can be significantly shortened.

〔Effect of the invention〕

As described above, according to the present invention, the well concentration under the field oxide film is lowered to an appropriate value by the first ion implantation,
Furthermore, since the high concentration region at the bottom of the retrograde well is formed deep into the substrate by second ion implantation, it is possible to reduce the junction capacitance and also reduce the amplification factor of the parasitic bipolar transistor, resulting in high speed and resistance to latch-up. There is an effect that a device can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing a method for forming a retrograde well according to an embodiment of the present invention. FIG. 2 is a diagram showing an impurity concentration profile when formed according to FIG. 1. FIG. 3 is a diagram showing a conventional retrograde well formation method. FIG. 4 is a diagram showing an impurity concentration profile when formed according to FIG. 3. 1 is a silicon substrate, 2 is a field oxide film, 4 is an impurity layer, 3 is a high concentration region, 4a is an implantation layer with increased concentration under the field oxide film 2, 5 is an intermediate region, and 6 is a shallow region. Note that the same reference numerals in the figures indicate the same or the same parts.

Claims (1)

[Claims] (1) In a method for manufacturing a semiconductor device having a MOS structure, the well formation step integrated with the field oxidation step of the semiconductor substrate includes a first ion implantation step to increase the well concentration under the field oxide film, and a step more than that. a step of performing a second ion implantation to increase the concentration in a deep region; a step of performing a third ion implantation to increase the concentration in a shallower region than the first implantation depth; a fourth ion implantation step for increasing the concentration in the intermediate region of the semiconductor device.