JPH02293915A - Micro computer - Google Patents

Abstract

PURPOSE:To eliminate the interruption of a processing of a program by annexing a counter mechanism, and a reference time generating circuit to a subsystem clock oscillating circuit, and a main system clock oscillating circuit, respectively. CONSTITUTION:A clock oscillated by a main system clock oscillating circuit 1 is sent to a reference time generating circuit 12 and generates a reference time. The reference time generating circuit 12 is constituted of a clock frequency dividing circuit 3 and a counting circuit 4. On the other hand, a clock oscillated by a subsystem clock oscillating circuit 2 is counted by a counter circuit 7, count data set to a data holding circuit 5 in advance by a reference time signal 13 generated from the reference time generating circuit 12 are compared with a count value of the counter circuit 7 by a comparing circuit 6, and in the case they coincide with each other, a coincidence signal 9 is generated. On the contrary, in the case of discrepancy, a reset signal 8 is sent to the counter circuit 7 and counting of a subsystem clock is executed again. In such a way, the confirmation of an oscillation of the subsystem clock and trimming of an oscillation frequency can be executed.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a microcomputer.

[Conventional technology]

Conventionally, this type of microcomputer has built-in a main system clock oscillation circuit used during normal operation and a subsystem clock oscillation circuit used for clock and backup.

FIG. 3 is a block diagram showing a conventional example.

At the time of power-on reset, the CPU normally operates using the main system clock, and if operation using the sub-system clock is required, oscillation is checked in advance by software.

[Problem to be solved by the invention]

In the conventional microcomputer described above, when operating on the subsystem clock (including peripheral hardware), the subsystem clock is supplied to the peripheral hardware in advance, and the subsystem clock oscillates. Since we are using a software method to check what is happening by checking the operation of the peripheral hardware, we are checking the operation of the peripheral hardware, or indirectly checking the oscillation of the subsystem clock, so we are checking the program. The disadvantage is that the processing is temporarily interrupted.

[Means to solve the problem]

The microcomputer of the present invention includes a reference time generation circuit composed of a clock frequency dividing circuit and a tenth counter circuit attached to a first clock oscillation circuit, and a second counter circuit attached to a second clock oscillation circuit. , a comparison circuit that compares the count value of the 20th counter circuit with preset data every reference time by the reference time generation circuit, and controls the preset value of the 20th counter circuit based on the comparison result. It consists of:

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of a first embodiment of the present invention.

The clock oscillated by the main system clock oscillation circuit 1 is sent to a reference time generation circuit 12 to generate a reference time. The reference time generating circuit 12 is a clock frequency dividing circuit 3.
and a count circuit 4.

On the other hand, the clock oscillated by the subsystem clock oscillation circuit 2 is counted by the counter circuit 7, and the count data set in advance in the data holding circuit 5 and the counter circuit 7 are counted by the counter circuit 7. The count values of the circuit 7 are compared by the comparison circuit 6 and if they match, a match signal 9 is generated. If they do not match, a reset signal 8 is sent to the counter circuit 7 and the subsystem clock is counted again.

By setting the reference time in this way, it is possible to check the oscillation of the subsystem clock and trim the oscillation frequency.

FIG. 2 is a block diagram of a second embodiment of the present invention.

Every time the reference time signal 13 is generated by the reference time generation circuit 12, the control circuit 14 checks the presence or absence of the match request signal 15 from the comparison circuit 6, and sends the match signal 9 and reset signal to the counter circuit 7 for counting. Clear.

The count data set in the data holding circuit 5 and the count data of the counter circuit 7 are successively compared, and if they match, a match request signal is sent to the control circuit 14.

〔Effect of the invention〕

As explained above, the microcomputer of the present invention has
By attaching a counter mechanism to the subsystem clock oscillation circuit and a reference time generation circuit to the main system clock oscillation circuit, the means for checking the oscillation of the subsystem clock can be made by reusing other peripheral hardware. In addition to this, trimming of the subsystem clock can also be done by software based on the reference time output from the reference time generation circuit.

Furthermore, the oscillation of the subsystem clock has the effect that a system can be constructed without considering wait time in terms of both software and hardware.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention;
The figure is a block diagram showing a second embodiment of the present invention, and FIG. 3 is a block diagram showing a conventional example. 1... Main system clock oscillation circuit,
2...Sub system clock oscillation circuit, 3
...Clock divider circuit, 4...Count circuit, 5...Data holding circuit, 6...
・Comparison circuit, 7... Counter circuit, 8...
...Reset signal, 9... Match signal, 10...
...Selector, 11...CPU clock signal, 12...Reference time generation circuit, 13...
...Reference time signal, 14... Control circuit, l5.
...Match request signal. Agent Patent Attorney Susumu Uchihara Daiguchi Z Akuzen

Claims (1)

[Claims] In a microcomputer incorporating a plurality of CPU clock oscillation circuits, a reference time generation circuit consisting of a first clock frequency division circuit and a first counter circuit attached to the first clock oscillation circuit, and a second clock oscillation circuit are provided. A second counter circuit attached to the circuit compares the count value of the second counter circuit with preset data at each reference time by the reference time generating circuit, and based on the comparison result, the second counter circuit A microcomputer characterized by including a comparison circuit that controls a preset value.