JPH0228831B2 - DENKIRYOKENSHUTSUSOCHI - Google Patents
DENKIRYOKENSHUTSUSOCHIInfo
- Publication number
- JPH0228831B2 JPH0228831B2 JP4145081A JP4145081A JPH0228831B2 JP H0228831 B2 JPH0228831 B2 JP H0228831B2 JP 4145081 A JP4145081 A JP 4145081A JP 4145081 A JP4145081 A JP 4145081A JP H0228831 B2 JPH0228831 B2 JP H0228831B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- level
- input
- level detection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000001514 detection method Methods 0.000 claims description 57
- 230000005611 electricity Effects 0.000 claims description 9
- 238000010586 diagram Methods 0.000 description 8
- 238000007599 discharging Methods 0.000 description 2
- 238000011084 recovery Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
- G01R19/16566—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
- G01R19/16585—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533 for individual pulses, ripple or noise and other applications where timing or duration is of importance
Description
【発明の詳細な説明】
この発明は、入力電気量が所定値以上か否かを
検出する電気量検出装置に係り、特に交流電気量
についての検出装置に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a quantity of electricity detection device for detecting whether an input quantity of electricity is equal to or greater than a predetermined value, and particularly relates to a detection device for an amount of alternating current electricity.
従来簡単な電気量検出装置としては、例えば交
流入力の全波整流波の瞬時値が所定値以上となる
期間か、所定時間以上か否かにより入力が所定値
以上か否かを検出する方法が一般的であつた。 Conventionally, as a simple electric quantity detection device, for example, there is a method of detecting whether the input is above a predetermined value based on whether the instantaneous value of the full-wave rectified wave of AC input is above a predetermined value or whether it is longer than a predetermined time. It was common.
以下第1図、第2図により従来の電気量検出装
置を説明する。第1図は従来の電気量検出装置の
一例を示すブロツク図で、Iは交流電気量Vが印
加される入力端子、1は全波整流回路、2はレベ
ル検出回路、T1は動作時間がT1で復帰時間が零
のタイマー回路、T2は動作時間が零で復帰時間
がT2のタイマー回路、Oは出力端子である。V1
は整流回路1の、V2はレベル検出回路2の、
VT1はタイマー回路T1の、Vpは出力端子Oの、
各々出力波形である。 A conventional electric quantity detection device will be explained below with reference to FIGS. 1 and 2. Fig. 1 is a block diagram showing an example of a conventional electric quantity detection device, where I is an input terminal to which an alternating current electric quantity V is applied, 1 is a full-wave rectifier circuit, 2 is a level detection circuit, and T1 is an operating time. T1 is a timer circuit whose return time is zero, T2 is a timer circuit whose operating time is zero and return time is T2 , and O is an output terminal. V 1
is of rectifier circuit 1, V 2 is of level detection circuit 2,
VT 1 is of timer circuit T 1 , V p is of output terminal O,
Each is an output waveform.
第2図は第1図の従来装置の動作説明図で、左
側部分イは入力電気量が設定値以下で不動作の場
合、右側部分ロは入力電気量が設定値以上で動作
の場合を示す。第2図イの場合は、整流回路1の
出力V1がレベル検出回路2の検出レベルVLを超
える期間t11がタイマー回路T1の設定時間T1より
短かいため、タイマー回路T1より出力が発しな
いので出力端子Oより出力が送出しない。 Fig. 2 is an explanatory diagram of the operation of the conventional device shown in Fig. 1, where the left part A shows the case where the input electricity amount is less than the set value and it is inactive, and the right part B shows the case where the input electricity amount is more than the set value and it is in operation. . In the case of Fig. 2 A, the period t 11 during which the output V 1 of the rectifier circuit 1 exceeds the detection level V L of the level detection circuit 2 is shorter than the set time T 1 of the timer circuit T 1 . Since no output is generated, no output is sent from output terminal O.
第2図ロの場合は、整流回路1の出力V1がレ
ベル検出回路2検出レベルVLを超える期間t12が
タイマー回路T1の設定時間T1より長いので、タ
イマー回路T1よりT12−T1の時間巾のパルス出力
が1/2サイクルに1回発生し、タイマー回路T2に
より連続化されて出力端子Oに連続的に出力され
る。ここでタイマー回路T1の動作時間T1は例え
ばT1=π/2=5ms(50サイクルベースにて)
に設定する。この場合レベル検出回路2の検出レ
ベルをV2とすれば
√2Vsinπ−π/2/2=√2Vsinπ/4=V≧VL
となり、入力電気量の実効値VがVLより大きい
か、否かを検出することになる。 In the case of FIG. 2B, the period t12 during which the output V1 of the rectifier circuit 1 exceeds the detection level VL of the level detection circuit 2 is longer than the set time T1 of the timer circuit T1 , so T12 is longer than the timer circuit T1 . A pulse output with a time width of -T1 is generated once every 1/2 cycle, made continuous by the timer circuit T2 , and continuously outputted to the output terminal O. Here, the operating time T 1 of the timer circuit T 1 is, for example, T 1 = π/2 = 5 ms (on a 50 cycle basis)
Set to . In this case, if the detection level of the level detection circuit 2 is V 2 , √2Vsinπ−π/2/2=√2Vsinπ/4=V≧V L , and whether the effective value V of the input electric quantity is larger than V L or not. It will be detected whether
またタイマー回路T2の復帰時間T2は動作入力
の時、前段のタイマー回路T1より1/2サイクルに
1回パルス出力が発生するのでT2=1/2+α(α
は余裕時間)例えばT2=1サイクル=20ms(50
サイクルベース)に設定する。 Also, the recovery time T 2 of the timer circuit T 2 is T 2 = 1/2 + α (α
is the margin time) For example, T 2 = 1 cycle = 20ms (50
cycle-based).
従来の電気量検出装置は以上のように構成され
ており入力電気量Vが正弦波入力の場合には正常
な動作が得られるが、入力電気量Vに波形歪が生
じた場合、入力電気量Vが設定値VL以上の大き
さであるにもかかわらず、動作できないという大
きな欠点があつた。 The conventional electric quantity detection device is configured as described above, and can operate normally when the input electric quantity V is a sine wave input. However, if the input electric quantity V has waveform distortion, the input electric quantity A major drawback was that it could not operate even though V was greater than the set value V L .
即ち第3図において、入力電気量Vが設定値
VL以上の大きさで本来動作すべきであるのもか
かわず、入力電気量Vに割れ目が生じた場合レベ
ル検出回路2の出力V2にも割れ目が生じ、この
ため、タイマー回路T1からパルス出力を発生す
ることができないので出力Vpが出力されない。 In other words, in Fig. 3, the input electricity quantity V is the set value.
Regardless of the fact that it should normally operate at a magnitude greater than or equal to V L , if a crack occurs in the input electrical quantity V, a crack also occurs in the output V 2 of the level detection circuit 2, and for this reason, the timer circuit T 1 Since a pulse output cannot be generated, the output V p is not output.
この発明は上記のような従来の電気量検出装置
の欠点を除去するためになされたもので、タイマ
ー回路T1の代りに積分回路を使用することによ
り、歪波、波形乱れによつて入力電気量Vに割れ
目が生じても応動できる高信頼性の優れた電気量
検出装置を提供することを目的とする。 This invention was made in order to eliminate the drawbacks of the conventional electric quantity detection device as described above. By using an integrating circuit in place of the timer circuit T1 , input electric power is reduced by distorted waves and waveform disturbances. It is an object of the present invention to provide a highly reliable and excellent electric quantity detection device that can respond even if a crack occurs in the quantity V.
以下本発明の一実施例を詳細に説明する。第1
図と同一部分を同一符号で示す第4図は、この発
明の電気量検出装置の実施例を示すブロツク図
で、S1はレベル検出回路2の出力が有の時充電さ
れ、出力が無の時放電される積分回路、21は積
分回路S1の出力が所定レベルVSLに達した時に検
出するレベル検出回路である。 An embodiment of the present invention will be described in detail below. 1st
FIG. 4, in which the same parts as in the figure are denoted by the same reference numerals, is a block diagram showing an embodiment of the electric quantity detection device of the present invention, in which S1 is charged when the output of the level detection circuit 2 is present, and when the output is no. The integral circuit 21 is a level detection circuit that detects when the output of the integral circuit S1 reaches a predetermined level VSL .
第5図は第4図の電気量検出装置の各部分の動
作説明図で、第5図の左側部分イは入力電気量V
≦VL(設定値)で不動作の場合、第5図の右側部
分ロは入力電気量V≧VL(設定値)で動作の場合
を示し、VS1は積分回路S1の出力波形、VSLはレ
ベル検出回路21の検出レベル、V21はレベル検
出回路21の出力波形を各々示す。 FIG. 5 is an explanatory diagram of the operation of each part of the electric quantity detection device of FIG. 4, and the left side part A of FIG.
In the case of non-operation when ≦V L (setting value), the right part B of Fig. 5 shows the case of operation when input electric quantity V≧V L (setting value), and V S1 is the output waveform of integrating circuit S 1 ; V SL indicates the detection level of the level detection circuit 21, and V 21 indicates the output waveform of the level detection circuit 21, respectively.
なお積分回路S1の積分定数は、レベル検出回路
2の出力が5ms/間(50サイクルベースの電気
角でπ/2)継続した時、積分回路S1の出力がレ
ベル検出回路21の検出レベルVSLに達するよう
に設定する。 The integral constant of the integrating circuit S 1 is such that when the output of the level detecting circuit 2 continues for 5 ms/time (π/2 in electrical angle based on 50 cycles), the output of the integrating circuit S 1 becomes the detection level of the level detecting circuit 21. Set to reach V SL .
また分積回路S1の放電定数も充電定数と同じ値
に設定される。即ちレベル検出回路2の出力無が
5ms間継続すれば積分回路S1の出力はVSLから
積分器のしきい値迄下降する。 Further, the discharging constant of the integrating circuit S1 is also set to the same value as the charging constant. That is, if no output from the level detection circuit 2 continues for 5 ms, the output from the integrating circuit S1 falls from VSL to the threshold value of the integrator.
以下第4図、第5図イ,ロによりこの発明の電
気量検出装置の動作を説明する。 The operation of the electric quantity detection device of the present invention will be explained below with reference to FIG. 4 and FIGS. 5A and 5B.
入力電気量V≦VLで不動作の場合、第5図イ
のように入力電気量Vがレベル検出回路2の検出
レベルVLを越える期間t11が5ms以下で積分回
路S1の出力は次段のレベル検出回路21の検出レ
ベルより低い範囲で充電・放電を繰り返すのみで
レベル検出回路21より出力は発生せず、従つて
出力端子Oから出力Vpは生じない。 If the input electricity quantity V≦V L and it is inactive, the output of the integrating circuit S 1 will be The level detection circuit 21 only repeats charging and discharging in a range lower than the detection level of the level detection circuit 21 at the next stage, and no output is generated from the level detection circuit 21, so no output V p is generated from the output terminal O.
入力電気量V≧VLで動作の場合、第5図ロの
ように入力電気量Vがレベル検出回路2の検出レ
ベルVLを超える期間t12が5ms以上で積分回路
S1の出力が、レベル検出回路21の検出レベル
VSLよりも大きい値迄上昇し、レベル検出回路2
1が検出して、次段のタイマー回路T2により連
続化され、出力端子Cに連続出力V0が得られる。 In the case of operation with input electric quantity V≧V L , as shown in Fig. 5 (b), if the period t 12 in which the input electric quantity V exceeds the detection level V L of the level detection circuit 2 is 5 ms or more, the integrating circuit is activated.
The output of S1 is the detection level of the level detection circuit 21.
V SL rises to a value larger than level detection circuit 2.
1 is detected and made continuous by the next stage timer circuit T2 , and a continuous output V0 is obtained at the output terminal C.
次に第6図により、入力電気量V≧VLで入力
電気量の波形に割れ目が生じた場合の動作を説明
する。 Next, with reference to FIG. 6, an explanation will be given of the operation when a crack occurs in the waveform of the input electric quantity when the input electric quantity V≧V L.
入力電気量の波形に割れ目が生じるとレベル検
出回路2の出力波形V2に割れ目が生じることは、
従来の装置と同じであるが、この発明の場合はこ
の割れ目により積分回路の出力VS1は、割れ目の
微小時間巾(例えば0.1ms)放電するのみで、
再び充電が継続され、積分回路S1の出力はレベル
検出回路21の検出レベル、VSLに達してレベル
検出回路21が応動して、出力端子Oに出力が得
られる。 If a crack occurs in the waveform of the input quantity of electricity, a crack will occur in the output waveform V2 of the level detection circuit 2.
Although it is the same as the conventional device, in the case of the present invention, the output V S1 of the integrating circuit is discharged only for a minute time width of the crack (for example, 0.1 ms) due to this crack.
Charging is continued again, and the output of the integrating circuit S1 reaches the detection level of the level detection circuit 21, VSL , and the level detection circuit 21 responds to provide an output at the output terminal O.
即ちこの発明によれば、入力電気量Vに波形
歪、波形乱れがあつても本来の機能を損わない装
置を簡単な回路構成により得ることができる。 That is, according to the present invention, it is possible to obtain a device with a simple circuit configuration that does not impair its original function even if the input electrical quantity V has waveform distortion or waveform disturbance.
以上の説明では整流回路1を全波整流回路とし
たが、場合により半波整流回路とすることもでき
る。この場合は動作限界入力の時、レベル検出回
路21からは1サイクルに1回の動作出力が得ら
れるのみであるから、タイマー回路T2の復帰時
間T2はT2=1サイクル+α(余裕)、例えばT2=
1.5サイクルに設定する。 In the above description, the rectifier circuit 1 is a full-wave rectifier circuit, but it can also be a half-wave rectifier circuit depending on the case. In this case, when the operation limit input is reached, the level detection circuit 21 only provides one operation output per cycle, so the recovery time T 2 of the timer circuit T 2 is T 2 = 1 cycle + α (margin). , for example T 2 =
Set to 1.5 cycles.
また上述の説明では、レベル検出回路21より
出力があれば出力端子Oに出力有とする検出装
置、即ち入力電気量Vが設定値V4より大きい場
合に動作する実施例について述べたが、逆にレベ
ル検出回路21に出力があれば出力端子Oに出力
無とすることも出来る。この場合は、レベル検出
回路21とタイマー回路T2の間に反転回路NOT
を挿設する。 Furthermore, in the above description, an embodiment was described in which the detection device outputs an output to the output terminal O if there is an output from the level detection circuit 21, that is, an embodiment that operates when the input electric quantity V is larger than the set value V4 . If there is an output to the level detection circuit 21, it is also possible to make the output terminal O have no output. In this case, an inverting circuit NOT is connected between the level detection circuit 21 and the timer circuit T2 .
Insert.
以上より記載のように、この発明によれば、従
来の装置タイマー回路T1を積分回路S1とレベル
検出回路21に置き替えるという簡単な回路構成
により、入力電気量Vに波形歪、波形乱れが生じ
ても電気量検出の本来の機能を何ら損なうことの
ない安定した極めて信頼性の高い電気量検出装置
を得ることができる。 As described above, according to the present invention, a simple circuit configuration in which the conventional device timer circuit T 1 is replaced with an integrating circuit S 1 and a level detection circuit 21 causes waveform distortion and waveform disturbance to the input electric quantity V. It is possible to obtain a stable and extremely reliable electrical quantity detection device that does not impair the original function of electrical quantity detection even if this occurs.
第1図は従来の電気量検出装置の一例を示すブ
ロツク図、第2図、第3図は第1図の動作説明
図、第4図はこの発明による電気量検出装置の一
実施例を示すブロツク図、第5図、第6図は第4
図の動作説明図、図中
I……入力端子、1……全波整流回路、2,2
1……レベル検出回路、T1……動作時間タイマ
ー回路、T2……復帰時間タイマー回路、S1……
積分回路、V……入力電気量である。またV1…
…全波整流回路1の出力波形、V2……レベル検
出回路2の出力波形、VT1……タイマー回路T1
の出力波形、V21……レベル検出回路21の出力
波形、Vp……出力端子Oの各々出力波形。なお
各図中、同一符号は同一又は相当部分を示す。
FIG. 1 is a block diagram showing an example of a conventional electrical quantity detection device, FIGS. 2 and 3 are diagrams explaining the operation of FIG. 1, and FIG. 4 shows an embodiment of the electrical quantity detection device according to the present invention. Block diagram, Figures 5 and 6 are the 4th
Operation explanatory diagram in the figure, I...Input terminal, 1...Full wave rectifier circuit, 2,2
1...Level detection circuit, T1 ...Operating time timer circuit, T2 ...Return time timer circuit, S1 ...
Integrating circuit, V... is input electrical quantity. Also V 1 …
...Output waveform of full-wave rectifier circuit 1, V 2 ...Output waveform of level detection circuit 2, VT 1 ...Timer circuit T 1
V 21 ...output waveform of the level detection circuit 21, V p ...output waveform of the output terminal O. In each figure, the same reference numerals indicate the same or corresponding parts.
Claims (1)
整流回路の瞬時値出力に応動する第1のレベル検
出回路と、この第1のレベル検出回路に出力が有
りの時充電し、出力が無となつたとき前記第1の
レベル検出回路に入力する整流回路の出力の周期
でしきい値まで放電する積分回路と、前記積分回
路の出力に応動する第2のレベル検出回路と、こ
の第2のレベル検出回路の出力を連続的に送出す
るタイマー回路とを備えた電気量検出装置。1. A rectifier circuit that rectifies the input AC quantity of electricity, a first level detection circuit that responds to the instantaneous value output of the rectification circuit, and charges when the first level detection circuit has an output, and charges when there is no output. an integrating circuit that discharges to a threshold value at the cycle of the output of the rectifier circuit that is input to the first level detecting circuit when the temperature increases; a second level detecting circuit that responds to the output of the integrating circuit; An electric quantity detection device equipped with a timer circuit that continuously sends out the output of a level detection circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4145081A JPH0228831B2 (en) | 1981-03-20 | 1981-03-20 | DENKIRYOKENSHUTSUSOCHI |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4145081A JPH0228831B2 (en) | 1981-03-20 | 1981-03-20 | DENKIRYOKENSHUTSUSOCHI |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57156566A JPS57156566A (en) | 1982-09-27 |
JPH0228831B2 true JPH0228831B2 (en) | 1990-06-26 |
Family
ID=12608709
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4145081A Expired - Lifetime JPH0228831B2 (en) | 1981-03-20 | 1981-03-20 | DENKIRYOKENSHUTSUSOCHI |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0228831B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05319163A (en) * | 1992-05-19 | 1993-12-03 | Mitsubishi Motors Corp | Truck |
JPH07117840A (en) * | 1993-10-25 | 1995-05-09 | Toyo Eng Corp | Conveying device for object to be conveyed on slanting surface |
-
1981
- 1981-03-20 JP JP4145081A patent/JPH0228831B2/en not_active Expired - Lifetime
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05319163A (en) * | 1992-05-19 | 1993-12-03 | Mitsubishi Motors Corp | Truck |
JPH07117840A (en) * | 1993-10-25 | 1995-05-09 | Toyo Eng Corp | Conveying device for object to be conveyed on slanting surface |
Also Published As
Publication number | Publication date |
---|---|
JPS57156566A (en) | 1982-09-27 |
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