JPH02287845A - Computer system - Google Patents

Abstract

PURPOSE:To switch the memory access grant time according to the working memories by deciding the access speed of a memory with the status signal received from a memory module and performing the waiting control to the access request of a CPU. CONSTITUTION:A memory module 3 owns a 2-bit status signal showing the access speed of a memory LSI packed into the module 3. A memory access control circuit 2 decides the access speed of the module 3 with the status signal received from the module 3. Then the circuit 2 performs the control to extend a memory cycle by one to an access request of a CPU 1 when the status signal is equal to '0' and applies the waiting control to the CPU 1. In such a way, the access speed is automatically controlled with the status signal of the memory module to be packed. Then the access speed can be automatically switched.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a computer system that can automatically switch the access speed according to the performance of installed memory.

(Prior Art) In recent years, with the advancement of semiconductor technology, microprocessors, memory LSIs, and peripheral control LSIs have become available at low cost, and it has become possible to construct relatively high-performance computer systems simply by appropriately combining these. Became. In particular, the performance of memory LSIs has improved dramatically, with faster speeds and larger capacities.

By the way, the maximum allowable time for memory access speed is determined, and the memory used in the system must be within the allowable time.

However, many types of memory ICs are now being produced, including those that are expensive but have fast access speeds, and those that are large in capacity and inexpensive but have slow access speeds, and they are mixed and used depending on the purpose. ing.

(Problem to be solved by the invention) According to the above conventional example, there is a limit due to the allowable time, so
The drawback was that it was not possible to implement and use memory in a system unless it had a certain access speed, regardless of the usage situation.

The present invention has been made in view of the above-mentioned drawbacks, and an object of the present invention is to provide a computer system having a function of changing the allowable memory access time depending on the memory used.

[Structure of the Invention] (Means for Solving the Problems) A computer system of the present invention includes a CPU, a memory module having a status signal indicating the access speed of the installed memory, and a status signal from the memory module. The present invention is characterized by comprising a memory access control circuit that determines the access speed of the memory and performs wait control on the access request of the CPU.

(Function) In the above configuration, a function is added to the memory module used to indicate the access speed as a status, and the memory access control circuit is activated in response to a status signal indicating the access time obtained from the memory module. By controlling the timing of access from a CPU (central processing unit), etc., the function of switching the access speed for the installed memory module is realized.

By controlling the access time according to the performance of the memory module used, automatic switching of access speed is realized, increasing the selection and degree of memory LSI used, and enabling flexible system construction. Become.

(Example) Embodiments of the present invention will be described below using the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention.

In the figure, 1 is a CPU (central processing unit, which is the control center of the system). 2 is a memory access control circuit, which uses a status signal from the memory module 3 to
Control access timing. A memory module 3 has a 2-bit status signal indicating the access speed of the installed memory.

FIG. 2 is a diagram showing the access timing of the memory module used in the embodiment of the present invention;
Two types shown in b) are illustrated. Figure 2 (a
), when the status signal is “0”, the CP
Command B to memory is extended by one cycle compared to U command A.

In type b, when the status signal is "]", command B to the memory is extended by two cycles compared to CPU command A.

The operation of the embodiment of the present invention will be explained below.

As described above, the memory module 3 has a 2-bit status signal indicating the access speed of the memory LSI mounted on the module. The memory access control circuit 2 determines the access speed of the memory module 3 based on the status signal from the memory module 3, and when the status signal is "0", the memory access control circuit 2 executes one cycle in response to an access request from the CPU 1. Perform control to extend the CPU
Add weight to. This is the memory LS shown in Figure 2a.
It is assumed that I is used.

When the status signal is "1", control is performed to extend memory access by two cycles as shown in b. In this way, the access speed is automatically controlled based on the status signal of the memory module installed.

Incidentally, in the embodiment of the present invention, the status No. 5 has been explained as having 2 bits, but it is not limited to 2 bits. Furthermore, the present invention can be applied not only to memory modules but also to everything related to access speed, such as memory ICs themselves and nonvolatile self-storage devices such as hard disks.

[Effects of the Invention] As explained above, according to the present invention, by controlling access time according to the performance of the memory module to be used, automatic switching of access speed is realized, and selection of the memory LSI to be used is realized. In addition to increasing the flexibility of system construction by 1-7J, the above-mentioned effects can also be obtained.

(1) By controlling access time according to the memory, memory modules can be ranked. In general, the faster the access time of a memory, the more expensive it is, so if you use a slower memory with the same memory capacity, it will be cheaper.

(2) Automatic switching is performed according to the status signal, so the user can use the memory without changing the settings.

(3) Distinguish between RAM and ROM in use 8 Do not use.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing access timing of a memory module used in the embodiment of the present invention. 1. CPU, 2. Memory access control circuit, 3.
・Memory module.

Claims (1)

[Claims] A CPU, a memory module that has a status signal that indicates the access speed of the installed memory, and a memory that determines the memory access speed based on the status signal obtained from this memory module and performs wait control for access requests from the CPU. A computer system comprising: an access control circuit.