JPH02287171A - Test circuit for semiconductor device - Google Patents

Abstract

PURPOSE:To decide the normal/defective condition of a multilevel with high speed by providing comparators discriminating the high/low value with a reference voltage come from the outside and shift registers fetching binarized data to output them to one output terminal for test. CONSTITUTION:A voltage combined with voltages V1-V4 is outputted to output terminals 1-n by the operation of a driver circuit 10. The outputted voltage levels of each terminal are compared with the reference voltage come from a reference input terminal 6 for decision by the comparator and binarized in accordance with the high/low value. The binarized data are fetched to the preset type shift registers with a latch timing and outputted successively to one output terminal 5 for test as a digital pattern with a clock signal come from a clock input terminal 8. With this arrangement, the measurement can be performed as the logic pattern and no function to detect an analog level is required, then the decision for the normal/defective condition of the multilevel can be made in high speed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a test circuit for a semiconductor device that is incorporated into a semiconductor device in order to determine the quality of the semiconductor device.

[Conventional technology]

Conventionally, the acceptability of semiconductor devices that have a large number of output terminals with multiple output levels has been determined by placing a measuring needle on all output terminals, by installing an analog switch circuit at each output terminal and sequentially measuring the voltage level, or by using a preset type A method was used in which only binary levels were measured using a shift register.

[Problem to be solved by the invention]

However, the method described above in which the measuring needles are applied to all output terminals has the disadvantage that the measuring needles may come into contact with each other, or it may become physically impossible to place the needles. The device requires analog detection functionality. Further, in the method of sequentially measuring voltage levels by providing an analog switch circuit at each output terminal, the time required for measurement is long and the measuring device requires an analog detection function. As a method for solving the above-mentioned problem, there is a method of measuring only binary levels using a preset type shift register, but this method has a problem in that it is impossible to measure analog values.

[Purpose of the invention]

An object of the present invention is to improve the above-mentioned problems, and even in a semiconductor device having a large number of output terminals that output multi-value voltage levels, it is possible to output any voltage level for all outputs without providing an analog detection function in the measuring device. The present invention provides a test circuit for a semiconductor device that is incorporated into a semiconductor device that can perform measurements.

[Means to solve the problem]

In order to achieve the above object, the present invention comprises a comparator circuit that discriminates whether or not a reference voltage level applied from the outside is exceeded, and a preset type shift register that takes in data binarized by the comparator circuit. Ru.

〔Example〕

Hereinafter, the present invention will be described in detail based on the drawings. FIG. 1 shows an embodiment of the present invention, for example, a case of a driver IC for driving a liquid crystal that outputs four-value voltage (■, . . . , ).

In Figure 1, 10 indicates the original driver circuit l-
H is the output terminal, 5 is the output terminal for measurement, 6 is the reference input terminal that provides the reference voltage for judgment, 7 is the latch timing input terminal that takes the output of the comparator into the shift register, 8 is the shift register contents A clock input terminal for outputting data to the measurement output terminal of the sample 5 is shown. Due to the operation of the driver circuit 10, a voltage obtained by synthesizing voltages V and -4 as shown in FIG. 2(a), for example, is output to each output terminal 1-n. The output voltage level of each terminal is set by a comparator to 1 if it is higher than the reference voltage, or 0 if it is lower than the reference voltage.
Valued. That is, if the reference voltage vref is set as shown in FIG. 2(a), the comparator output will be as shown in FIG. 2(b). The value is taken into the preset type shift register at the latch timing and sequentially converted into a digital pattern using the clock signal at the measurement output terminal 5II? : Output.

The output voltage may have any value, and the reference voltage is set to any level depending on the purpose. Also,
The comparator is 0 if higher than the reference voltage,
A low value may be binarized to 1.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, an analog output is converted into a digital value and can be measured as a logic pattern. Furthermore, since the measuring device does not need to have an analog level detection function, a conventional logic tester can quickly determine the quality of multi-value levels.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2(a) is a waveform diagram of an output terminal output, and FIG. 2(b) is a waveform diagram of a comparator output. 1-3. n...Output terminal, 5...Output terminal for measurement, 6...Reference input terminal for judgment, 7...
... Latch timing input terminal, 8 ... Clock input terminal, 10 ... Driver circuit. Figure 1

Claims (1)

[Claims] In a semiconductor device having a plurality of output terminals that output multi-value voltage levels, a comparator circuit that compares the output voltage level with an externally applied reference voltage level to determine whether it is large or small and outputs a binary data group; A test circuit for a semiconductor device, comprising a preset shift register that takes in the data group and sequentially outputs the data to one test output terminal.