JPH022842U - - Google Patents

Info

Publication number
JPH022842U
JPH022842U JP1989004517U JP451789U JPH022842U JP H022842 U JPH022842 U JP H022842U JP 1989004517 U JP1989004517 U JP 1989004517U JP 451789 U JP451789 U JP 451789U JP H022842 U JPH022842 U JP H022842U
Authority
JP
Japan
Prior art keywords
conductor
semiconductor chip
plane
projection
shape
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1989004517U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0236285Y2 (US20050271598A1-20051208-C00001.png
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPH022842U publication Critical patent/JPH022842U/ja
Application granted granted Critical
Publication of JPH0236285Y2 publication Critical patent/JPH0236285Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5383—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
JP1989004517U 1981-12-23 1989-01-20 Expired JPH0236285Y2 (US20050271598A1-20051208-C00001.png)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP81110713A EP0082216B1 (de) 1981-12-23 1981-12-23 Mehrschichtiges, keramisches Substrat für integrierte Halbleiterschaltungen mit mehreren Metallisierungsebenen

Publications (2)

Publication Number Publication Date
JPH022842U true JPH022842U (US20050271598A1-20051208-C00001.png) 1990-01-10
JPH0236285Y2 JPH0236285Y2 (US20050271598A1-20051208-C00001.png) 1990-10-03

Family

ID=8188083

Family Applications (2)

Application Number Title Priority Date Filing Date
JP57183009A Pending JPS58114498A (ja) 1981-12-23 1982-10-20 基板
JP1989004517U Expired JPH0236285Y2 (US20050271598A1-20051208-C00001.png) 1981-12-23 1989-01-20

Family Applications Before (1)

Application Number Title Priority Date Filing Date
JP57183009A Pending JPS58114498A (ja) 1981-12-23 1982-10-20 基板

Country Status (4)

Country Link
US (1) US4551789A (US20050271598A1-20051208-C00001.png)
EP (1) EP0082216B1 (US20050271598A1-20051208-C00001.png)
JP (2) JPS58114498A (US20050271598A1-20051208-C00001.png)
DE (1) DE3172643D1 (US20050271598A1-20051208-C00001.png)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04133449U (ja) * 1991-05-29 1992-12-11 京セラ株式会社 半導体素子収納用パツケージ

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4521449A (en) * 1984-05-21 1985-06-04 International Business Machines Corporation Process for forming a high density metallurgy system on a substrate and structure thereof
JPS6298264U (US20050271598A1-20051208-C00001.png) * 1985-12-11 1987-06-23
US4873615A (en) * 1986-10-09 1989-10-10 Amp Incorporated Semiconductor chip carrier system
JPS63211692A (ja) * 1987-02-27 1988-09-02 株式会社日立製作所 両面配線基板
US5066831A (en) * 1987-10-23 1991-11-19 Honeywell Inc. Universal semiconductor chip package
US4861944A (en) * 1987-12-09 1989-08-29 Cabot Electronics Ceramics, Inc. Low cost, hermetic pin grid array package
JPH01154669U (US20050271598A1-20051208-C00001.png) * 1988-04-14 1989-10-24
FI113937B (fi) * 1989-02-21 2004-06-30 Tatsuta Electric Wire & Gable Painettu piirilevy ja menetelmä sen valmistamiseksi
US5036163A (en) * 1989-10-13 1991-07-30 Honeywell Inc. Universal semiconductor chip package
US5220490A (en) * 1990-10-25 1993-06-15 Microelectronics And Computer Technology Corporation Substrate interconnect allowing personalization using spot surface links
US6331680B1 (en) 1996-08-07 2001-12-18 Visteon Global Technologies, Inc. Multilayer electrical interconnection device and method of making same
GB9807616D0 (en) * 1998-04-08 1998-06-10 Weatherley Richard Reduction of crosstalk in data transmission system
EP1083779B1 (en) 1998-05-19 2007-01-24 Ibiden Co., Ltd. Printed circuit board and method of production thereof
US6249047B1 (en) 1999-09-02 2001-06-19 Micron Technology, Inc. Ball array layout
US6217989B1 (en) * 1999-12-10 2001-04-17 International Business Machines Corporation Conductive line features for enhanced reliability of multi-layer ceramic substrates
US6548757B1 (en) 2000-08-28 2003-04-15 Micron Technology, Inc. Microelectronic device assemblies having a shielded input and methods for manufacturing and operating such microelectronic device assemblies
US6710255B2 (en) * 2001-03-30 2004-03-23 Intel Corporation Printed circuit board having buried intersignal capacitance and method of making
JP5014642B2 (ja) * 2006-02-16 2012-08-29 株式会社トクヤマ リード内蔵メタライズドセラミックス基板およびパッケージ
US20130161083A1 (en) * 2011-12-22 2013-06-27 Tyco Electronics Corporation Printed circuit boards and methods of manufacturing printed circuit boards

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3022480A (en) * 1957-02-07 1962-02-20 Tiffany Frank Emery Sandwich circuit strips
US2963535A (en) * 1957-12-16 1960-12-06 Sanders Associates Inc Shielded printed circuit electrical component
GB1157268A (en) * 1965-08-18 1969-07-02 Int Computers Ltd Electric Interconnection Units
GB1187619A (en) * 1967-12-08 1970-04-08 Ferranti Ltd Improvements relating to Electrical Interconnection Grids
US3546539A (en) * 1968-05-28 1970-12-08 Texas Instruments Inc Integrated circuit mounting panel
CH469424A (de) * 1968-06-10 1969-02-28 Contiflex Ag Mehrschichtige gedruckte Schaltung und Verfahren zu ihrer Herstellung
US3621116A (en) * 1969-12-29 1971-11-16 Bertram C Adams Printed circuit board
US3818117A (en) * 1973-04-23 1974-06-18 E Reyner Low attenuation flat flexible cable
DE2345572A1 (de) * 1973-09-10 1975-03-20 Pico Inc Schaltbrett
US3902790A (en) * 1974-01-14 1975-09-02 Hughes Aircraft Co Liquid crystal display pattern
US3939381A (en) * 1974-03-22 1976-02-17 Mcm Industries, Inc. Universal burn-in fixture
US3914531A (en) * 1974-03-29 1975-10-21 Amp Inc Power isolated transmission cable assembly
DE2940593A1 (de) * 1979-10-06 1981-04-16 Ibm Deutschland Gmbh, 7000 Stuttgart Mehrlagen-modul mit konstantem wellenwiderstand

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04133449U (ja) * 1991-05-29 1992-12-11 京セラ株式会社 半導体素子収納用パツケージ

Also Published As

Publication number Publication date
EP0082216A1 (de) 1983-06-29
EP0082216B1 (de) 1985-10-09
JPH0236285Y2 (US20050271598A1-20051208-C00001.png) 1990-10-03
JPS58114498A (ja) 1983-07-07
US4551789A (en) 1985-11-05
DE3172643D1 (en) 1985-11-14

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