JPH0228132U - - Google Patents
Info
- Publication number
- JPH0228132U JPH0228132U JP10606388U JP10606388U JPH0228132U JP H0228132 U JPH0228132 U JP H0228132U JP 10606388 U JP10606388 U JP 10606388U JP 10606388 U JP10606388 U JP 10606388U JP H0228132 U JPH0228132 U JP H0228132U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- synchronization signal
- amplifier circuit
- signal output
- attenuation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 4
- 230000003321 amplification Effects 0.000 claims 1
- 238000003199 nucleic acid amplification method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Manipulation Of Pulses (AREA)
- Control Of Amplification And Gain Control (AREA)
Description
第１図は本考案になる同期信号入力回路の一実
施例の回路図、第２図Ａ〜Ｄは各種同期信号の波
形図、第３図Ａ〜Ｃは従来の同期信号入力回路の
回路図である。
１……入力端子、２……出力端子、３……減衰
回路、４……Ａ級増幅回路（第１の増幅回路）、
５……レベル検出回路、６……Ｂ級増幅回路（第
２の増幅回路）、Ｃ１〜Ｃ４……コンデンサ、Ｄ
１，Ｄ３，Ｄ４……ダイオード、Ｄ２……ツエナ
ーダイオード、Ｑ１〜Ｑ４……ＮＰＮトランジス
タ、Ｑ５……ＰＮＰトランジスタ、Ｒ１〜Ｒ１２
……抵抗。
Fig. 1 is a circuit diagram of an embodiment of the synchronous signal input circuit according to the present invention, Figs. 2 A to D are waveform diagrams of various synchronous signals, and Figs. 3 A to C are circuit diagrams of a conventional synchronous signal input circuit. It is. 1... Input terminal, 2... Output terminal, 3... Attenuation circuit, 4... Class A amplifier circuit (first amplifier circuit),
5...Level detection circuit, 6...Class B amplifier circuit (second amplifier circuit), C1 to C4 ...Capacitor, D
1 , D3 , D4 ...Diode, D2 ...Zener diode, Q1 to Q4 ...NPN transistor, Q5 ...PNP transistor, R1 to R12
……resistance.
Claims (1)
号を所定量減衰させる減衰回路と、 この減衰回路から出力される同期信号をＡ級増
幅する第１の増幅回路と、 この第１の増幅回路から出力される同期信号の
振幅をピーク値検波し、そのピーク値の電圧が所
定値以上になつた場合、前記減衰回路に前記検出
信号を供給するレベル検出回路と、 前記第１の増幅回路から出力される同期信号を
Ｂ級増幅する第２の増幅回路とより構成したこと
を特徴とする同期信号入力回路。[Claims for Utility Model Registration] An attenuation circuit that attenuates an incoming synchronization signal by a predetermined amount according to a supplied detection signal, and a first amplifier circuit that class-A amplifies the synchronization signal output from this attenuation circuit. and a level detection circuit that detects the peak value of the amplitude of the synchronization signal output from the first amplifier circuit and supplies the detection signal to the attenuation circuit when the voltage of the peak value exceeds a predetermined value. A synchronization signal input circuit comprising: a second amplifier circuit that performs class B amplification of the synchronization signal output from the first amplifier circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10606388U JPH0228132U (en) | 1988-08-11 | 1988-08-11 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10606388U JPH0228132U (en) | 1988-08-11 | 1988-08-11 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0228132U true JPH0228132U (en) | 1990-02-23 |
Family
ID=31339238
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10606388U Pending JPH0228132U (en) | 1988-08-11 | 1988-08-11 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0228132U (en) |
-
1988
- 1988-08-11 JP JP10606388U patent/JPH0228132U/ja active Pending
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