JPH02279040A - Fault detection system for multi-processor system - Google Patents

Fault detection system for multi-processor system

Info

Publication number
JPH02279040A
JPH02279040A JP1098957A JP9895789A JPH02279040A JP H02279040 A JPH02279040 A JP H02279040A JP 1098957 A JP1098957 A JP 1098957A JP 9895789 A JP9895789 A JP 9895789A JP H02279040 A JPH02279040 A JP H02279040A
Authority
JP
Japan
Prior art keywords
processor
fault
monitoring
signal
timer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1098957A
Other languages
Japanese (ja)
Other versions
JP2917291B2 (en
Inventor
Kazuo Nishidai
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Priority to JP1098957A priority Critical patent/JP2917291B2/en
Publication of JPH02279040A publication Critical patent/JPH02279040A/en
Application granted granted Critical
Publication of JP2917291B2 publication Critical patent/JP2917291B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE: To detect the fault of a system without the provision of a master processor by applying processor fault detection notice when it is detected a reception section is in the nonreception state of an operation monitoring signal even after the prescribed time elapse and inputting a new operation monitoring signal to a transmission section.
CONSTITUTION: When a fault takes place in a processor 2, a processor 3 cannot receive an operation monitoring signal S1 from the processor 2. A monitoring section 7 of the processor 3 resets a timer 8 at the transmission (point A) of the preceding operation monitoring signal S1 and counts the reception time based on a clock signal (c) from the timer 8, the elapse of the next signal reception timing time T111 is recognized and the occurrence of the fault in the processor 2 is discriminated. The monitoring section 7 based on the discrimination informs the fault detection of the processor 2 to reset the timer 8 to send the operation monitoring signals S1 to the processor 4. Thus, the fact of the occurrence of the fault is discriminated by individual processors 1-4.
COPYRIGHT: (C)1990,JPO&Japio
JP1098957A 1989-04-20 1989-04-20 Fault detection method for multiprocessor systems Expired - Fee Related JP2917291B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1098957A JP2917291B2 (en) 1989-04-20 1989-04-20 Fault detection method for multiprocessor systems

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1098957A JP2917291B2 (en) 1989-04-20 1989-04-20 Fault detection method for multiprocessor systems

Publications (2)

Publication Number Publication Date
JPH02279040A true JPH02279040A (en) 1990-11-15
JP2917291B2 JP2917291B2 (en) 1999-07-12

Family

ID=14233566

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1098957A Expired - Fee Related JP2917291B2 (en) 1989-04-20 1989-04-20 Fault detection method for multiprocessor systems

Country Status (1)

Country Link
JP (1) JP2917291B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009087149A (en) * 2007-10-01 2009-04-23 Nec Corp Electronic device, data processor, and bus control method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5424508A (en) * 1977-07-26 1979-02-23 Fujitsu Ltd Filure detection system for loop delivery

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5424508A (en) * 1977-07-26 1979-02-23 Fujitsu Ltd Filure detection system for loop delivery

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009087149A (en) * 2007-10-01 2009-04-23 Nec Corp Electronic device, data processor, and bus control method

Also Published As

Publication number Publication date
JP2917291B2 (en) 1999-07-12

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