JPH02271742A - Data communication system - Google Patents

Abstract

PURPOSE:To improve the utilizing efficiency of a digital transmission line by providing a digital interface device on each station and using an individual signal bit in multiplex with a call control signal and a data control signal. CONSTITUTION:A data control signal and a call signal are sent to a controller CTL 6 via a CPU 15 with an exchange main body. The information is stored respectively to a data control signal storage circuit MD 5 and a call control signal storage circuit MC 4. A multiplexing circuit MUX 3 reads a signal in the MC 4, MD 5 to apply time division multiplex to generate an individual signal bit. Moreover, the MUX 2 multiplexes an input signal 13 from an exchange with a signal from the MUX 3 and sends the result to a digital transmission line 14. A signal from a transmission line 16 is converted into a unipolar signal by an RCV 11 and each channel signal is demultiplexed into a data channel signal 17 and an individual signal bit by an expansion circuit DMX 10. The digital interface device provide on each station applies time division multiplex to use the transmission line effectively.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data communication system, and particularly to a data communication system in a digital data communication network.

[Conventional technology]

Conventionally, this type of data communication system has been configured to transmit a data control signal using at least one bit within the data channel, in addition to the individual signal bits allocated within the data channel for call control. .

[Problem to be solved by the invention]

In the conventional data communication system described above, one bit of the bit string assigned to each channel is used for a call control signal, and at least one other bit is used for a data control signal. Generally, changes in data control signals are much smaller than changes in data signals, and call control signals can similarly be transmitted at low speeds.

Therefore, the conventional data communication system that allocates one bit to each of these low-speed control signals has the disadvantage that the use efficiency of the digital transmission path is low and the data transmission speed that can be handled is also reduced by the amount of the control signal.

[Means to solve the problem]

The data communication system of the present invention is a digital data communication network that performs data communication between a plurality of exchanges connected by a digital transmission path, in which each exchange transmits a data channel for transparently transmitting data and a call control signal to the data channel. one of them
The digital interface device has a digital interface device for transmitting signals using individual signal bits, and the digital interface device includes multiplexing means for time-division multiplexing a data control signal in data communication and the call control signal, and a The present invention is characterized by comprising a sending means for sending a multiplexed signal into the individual signal bits, and a separating means for separating a data control signal and a call control signal from the signal of the individual signal bits.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of a digital interface device showing an embodiment of the present invention, and FIG. 2 is a frame configuration diagram showing an example of a frame used in the digital interface device in FIG.

In Fig. 2(a), one frame consists of one frame signal bit (hereinafter referred to as F) and 24 data channels (hereinafter referred to as DC
HO, ~DCH23). Each DCH
(For example, DCH2) consists of a 1-bit individual signal bit bo and 7 data signal bits E) 1+ to b. Six frames are collected to transmit and receive call control signals, etc., and one multi-frame (first (multi-frame).

In other words, in the first multiframe, 1 for every 6 frames.
Only one individual signal bit b, is used as the individual signal bit of the bit. In addition, as shown in Fig. 2(b), 4
first multi-frames A.

A set of B, C, and D constitutes a second multiframe. Note that in the second multiframe, one individual signal bit bo of the first multiframes A, B, and C is assigned to a call control signal, and one individual signal bit bo of the first multiframe D is assigned to a data control signal. This allocation method can be arbitrarily set by changing the multiframe configuration, and it is also possible to further multiplex other signals.

Next, in FIG. 1, the digital interface device in this embodiment includes a driver (hereinafter referred to as DRV) 1, a multiplexing circuit (hereinafter referred to as MUX) 2, 3, a call control signal storage circuit (hereinafter referred to as MC) 4, and a data control signal A storage circuit (hereinafter referred to as MD) 5, a control device (hereinafter referred to as CTL) 6, a data control signal reception buffer (hereinafter referred to as BD) 7, a call control signal reception buffer (hereinafter referred to as BC) 8, and an expansion circuit (hereinafter referred to as DMX) 9. 10, a receiver (hereinafter referred to as RCV) 11, and a timing generation circuit (hereinafter referred to as TMG) 12.
2 to control each circuit.

Next, the operation of this embodiment will be explained.

The operation in the direction from the exchange to the digital transmission path is as follows. Data control signals and call control signals are sent to the CTL 6 via the CPU bus 15 connected to the exchange main body.

CTL6 converts the sent information into MD5 and MC, respectively.
Store in 4. The first MUX 3 is used to create a second multiframe, reads out signals from MC4 and MD5 according to signals from 7MG 12, performs time division multiplexing, and creates individual signal bits. Second MUX2
multiplexes the input data signal 13 from the exchange and the signal from MUX 3, and outputs one individual signal bit b every 6 frames.
Create a first multiframe containing o. The signal from MUX2 is sent to digital transmission line 14 via DRVI.

On the other hand, the signal from the digital transmission line 16 is converted into a unipolar signal by RCVll, and the signal of each channel is separated into a data channel signal and individual signal bits by the first DMXlo. The separated data channel signal is sent to the exchange as an output data signal 17, and the individual signal bits are separated by the second DMX 9 into a data control signal and a call control signal, which are stored in BD 7 and BC 8, respectively. The CTL 6 reads the data control signal and the call control signal from the BD 7 and BC 8 and sends them via the CPU bus 15 to a control device (not shown) of the exchange.

The call is set by activating the MC 4 and sending out a call signal 1 selection signal in response to an instruction from the CTL 6. In the called side exchange, CTL6 converts the call control signal from the calling side exchange into BC.
Read and receive calls via 8.

Notifies call control information such as selection signals to the exchange main body, and connects to extension data subscribers. Data control information from the extension data subscriber of the exchange is similarly sent to the CTL 6 via the CPU bus 15, and is sent to the CTL 6 through the MD5°MUX3, 2 . DRVI
The signal is sent to the digital transmission line 14 via. R in the game
CVll, DMXlo, 9. It arrives at CTL6 via BD7, and CTL6 is sent to the control unit of the exchange via CPU bus 15, and transmitted to the extension data subscriber at the opposite station.

In this embodiment, the controlled signal and data control signal are controlled and read by the CTL 6, but it is also possible to control this signal by placing it on a predetermined time slot inside the exchange. .

〔Effect of the invention〕

As explained above, the present invention improves the usage efficiency of digital transmission paths by time-division multiplexing the individual signal bits of the digital interface device provided in each station with call control signals and data control signals. This has the effect of being able to handle faster data within the channel.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a digital interface device showing an embodiment of the present invention, and FIG. 2 is a frame configuration diagram showing an example of a frame used in the digital interface device in FIG. 1... Driver (DRV), 2.3... Multiplexing circuit (MUX), 4... Call control signal storage circuit (MC), 5
... data control signal storage circuit (MD), 6 ... control device (CTL), 7 ... data control signal reception buffer (BD), 8 ... call control signal reception buffer (BC),
9.10... Deployment circuit (DMX), 11... Receiver (RCV), 12... Timing generation circuit (TMG)
), 13... Input data signal, 14.16... Digital transmission line, 15... CPU bus, 17... Output data signal. Hongome o-, 绝瓜(transition) meeting

Claims (1)

[Claims] In a digital data communication network that performs data communication between multiple exchanges connected by a digital transmission path, each exchange transmits a data channel for transparently transmitting data and a call control signal using one individual signal bit in the data channel. The digital interface device includes a multiplexing means for time-division multiplexing a data control signal in data communication and the call control signal, and a multiplexing means for time-division multiplexing a data control signal in data communication and the call control signal, 1. A data communication system comprising: sending means for sending out individual signal bits; and separating means for separating a data control signal and a call control signal from the individual signal bits.