JPH0226096A - Manufacture of additive process wiring board - Google Patents

Abstract

PURPOSE:To simplify manufacturing process by a method wherein a laminate obtained by laminating a multilayer film on a circuit substrate at reduced pressure is heat hardened at the atmospheric pressure. CONSTITUTION:A multilayer film M consists of an insulating layer 4 and an additive layer 5. This insulating layer 4 is an organic layer having insulating capacity with respect to an inner layer circuit, which is made of a compound of epoxy resin and synthetic rubber. The additive layer 5 is an organic layer where a circuit is formed due to electroless plating, which is made of a blended material of a rubber component and a hardening resin component. The multilayer film M is laminated on a circuit substrate at reduced pressure. This provides a copper pattern 2 on the upper surface of an insulating substrate 1, the insulating layer 4 and the additive layer 5 are laminated, and a laminate T is heat-hardened at the atmospheric pressure. This simplifies manufacturing process.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an advantageous method for manufacturing an additive wiring board.

[Prior art]

Conventionally, a multilayer circuit board obtained by an additive method is one in which a plurality of layers of conductive circuits are laminated with an insulating layer interposed therebetween, and has been used in various ways as components of electrical products and the like. The production of this multilayer circuit board is carried out, for example, by applying insulation on both sides of a printed circuit board 30 in which copper patterns 2 are provided on both sides of an insulating substrate 1 shown in FIG. 6(A), as shown in FIG. 6(B). N
Then, as shown in FIG. 6(C), an additive layer 5 is deposited on the surface of the insulating layer 4, and the surface of the additive layer 5 is coated with a chromic acid mixture (CrQz +
After making the surface hydrophilic (roughening) with H2SO4), a catalyst such as palladium chloride is applied to this surface to perform a surface activation treatment (excluding cases where a catalyst has been added in advance) to This is done by masking the circuit-forming part with a photosensitive lacquer (photoresist) by a photographic method or by forming a resist film by screen printing, and then electroless plating the circuit-forming part. The lamination of the insulating layer 4 and the additive N5 shown in FIGS.
The method is carried out (under reduced pressure) as disclosed in Japanese Patent Application Laid-open No. 726 and Japanese Patent Application Laid-Open No. 62-236727.

Note that the printed circuit board 3 shown in FIG. 6(A) is
Commonly used copper-clad laminates are manufactured using the subtractive method.

However, manufacturing a multilayer circuit board in this way requires a complicated manufacturing process because it takes time and effort to manufacture an additive method wiring board, as shown in FIGS. 6(A) to 6(C). There are problems such as:

[Purpose of the invention]

An object of the present invention is to provide a method for manufacturing an additive wiring board that simplifies the manufacturing process.

[Structure of the invention]

For this reason, the present invention consists of an additive layer (organic N in which a circuit is formed by electroless plating) and an insulating layer (an organic layer having an insulating function with respect to the inner layer circuit) mainly composed of epoxy resin and synthetic rubber. The gist of the present invention is a method for manufacturing an additive wiring board, which is characterized by laminating a multilayer film of the following method onto a substrate under reduced pressure, and then heating and curing the resulting laminate.

Hereinafter, the configuration of the present invention will be explained in detail with reference to the drawings.

FIG. 1 is an explanatory cross-sectional view of an example of a multilayer film used in the present invention. In FIG. 1, a multilayer film M consists of an insulating layer 4 and an additive layer 5.

The insulating layer 4 is an organic layer having an insulating function with respect to the inner layer circuit, which is characteristic in the present invention, and has advantages such as being able to be laminated to the inner layer circuit under reduced pressure and being able to be cured under normal pressure. It is made of a blend of epoxy resin and synthetic rubber. As the epoxy resin, bisphenol/ebichlorhydrinib, novolac type, alicyclic type epoxy resin, etc. can be used. Moreover, when imparting flame retardancy, a Brized epoxy resin may be used. As the synthetic rubber, styrene-butadiene rubber, butadiene rubber, acrylonitrile-butadiene rubber, chloroprene rubber, isoprene rubber, butyl rubber, etc. can be used. Among them, acrylonitrile butadiene rubber (NBR) is particularly preferred. The additive layer 5 is an organic layer on which a circuit is formed by electroless plating, and this layer may also be made of commonly used rubbers such as NBR, butadiene rubber (BR), styrene-butadiene rubber (SBR), etc. Ingredients and phenolic resin,
It is a blend with curable resin components such as epoxy resin and melamine resin.

The insulating layer 4 is in an uncured state to improve adhesion to the copper pattern of the inner circuit board when laminated onto the inner circuit board, but the additive layer 5 may be uncured or cured.

When the additive layer 5 is uncured, the surface of the additive layer 5 may be protected by covering the surface with a release film such as a polyethylene terephthalate film (PET).

When the additive layer 5 is cured, the components of the insulating layer 4 are prevented from diffusing into the additive layer 5 compared to when the additive layer 5 is not cured, so that roughening of the additive layer 5 during electroless plating is prevented. becomes easier.

In addition, in order to further improve the adhesion with the inner layer circuit board,
As shown in FIG. 2, an adhesive layer 6 may be laminated on the insulating layer 4.

In order to prevent the components of the insulating layer 4 from diffusing into the additive layer 5, a barrier layer 7 may be interposed between the insulating layer 4 and the additive layer 5, as shown in FIG.

Furthermore, in order to prevent the components of the insulating layer 4 from diffusing into the additive layer 5, the portion 8 of the insulating layer in contact with the additive layer may be hardened, as shown in FIG.

In the present invention, the multilayer film M described above is laminated onto a circuit board (same as the printed circuit board 3 shown in FIG. 6(A)) under reduced pressure.

This lamination may be performed using a vacuum laminator. The reduced pressure may be on the order of several torr to several tens of torr. The reason for performing the process under reduced pressure is to prevent voids from forming between the layers. In this way, a laminate T shown in FIG. 5 is obtained.

Note that the substrates on which the multilayer film according to the present invention can be used include:
It is not particularly limited.

For example, it may be used for laminates with a thickness of about 0.1 to 0.05 mm where it is difficult to form an additive layer by dip coating or curtain coating.

In FIG. 5, a copper pattern 2 (inner layer circuit) is arranged on the upper surface of an insulating substrate 1, and an insulating layer 4 and an additive layer 5 are laminated thereon. 10 is a release film.

Next, in the present invention, the laminate T is heated and cured under normal pressure. This curing takes place between 120°C and 170°C.
This may be carried out by heating the laminate T at a temperature of 1 to 4 hours.

The surface of the additive layer of the wiring board thus obtained can be activated by a conventional method to perform electroless plating.

Examples and comparative examples are shown below.

Example 1 The multilayer film (containing a plating catalyst) shown in FIG. 1 was laminated on both sides of the double-sided printed circuit board containing a plating catalyst (manufactured by Hitachi Chemical Co., Ltd.) shown in FIG. A laminate shown in was produced. This lamination was carried out using a vacuum laminator at a vacuum degree of 40 torr, a lamination roll surface temperature of 100° C., a substrate feed rate of 1.3 m/min, and a roll pressure of 3 kg/cm.

Next, peel off the release film on the surface of the laminate,
Curing was carried out for 2 hours at normal pressure in an electric oven set at 150°C.

Using the obtained laminate molded product, evaluation tests were conducted for the following items 1 to 2. The results are shown in Table 1.

■ Thickness of resin layer (μ).

The thickness of the additive layer (hereinafter referred to as AD layer) and insulating layer after curing was measured by taking photographs of fractured cross sections at five locations using an optical microscope, and the thickness was expressed as the variation with respect to the target thickness.

■ Occurrence of voids in multilayer film.

The presence or absence of voids in the multilayer film was confirmed by visually observing the laminate molded product. When the occurrence of voids was not observed, it was marked as "○", and when the occurrence of voids was observed, it was marked as "x".

■ Defects in circuit pattern formation.

Both outer surfaces (AD layers) of the laminated molded product are roughened with a chromic acid mixture, and a Menki resist is printed on areas other than the circuit pattern.
Copper was added to the conductor circuit to a predetermined thickness by electroless copper plating to form a circuit pattern, and the circuit pattern was visually observed to see if any defective parts had occurred.

If no defective part was observed, it was marked "○", and if any defective part was observed, it was marked "x".

Note that "-" indicates a case where no test was conducted.

■ Adhesion of circuit pattern.

For the circuit board obtained in above ■, JIS C64815,
1. By peeling off the circuit pattern in accordance with 7. Peel strength was measured.

If it was 1.8 kgf/cm or more, it was marked "○", and if it was less than that, it was marked "x". Note that "-" indicates a case where no test was conducted.

Example 2 The multilayer film shown in Fig. 1 (containing a plating catalyst, AD layer is hardened) was laminated on both sides of the double-sided printed circuit board containing a plating catalyst (manufactured by Hitachi Chemical Co., Ltd.) shown in Fig. 6 (A). A laminate shown in FIG. 5 was produced. For this lamination, a vacuum laminator was used, the degree of vacuum was 20 Torr, the surface temperature of the laminating roll was 80°C, and the substrate feed speed was 1.3 m/
Lamination was performed at a roll pressure of 4 kg/cm.

Next, with the release film attached to the surface of the laminate, 1
The curing process was performed at normal pressure for 1 hour in an electric open set at 50°C. After peeling off the release film from the surface of the obtained laminate molded product, an evaluation test was conducted in the same manner as in Example 1. The results are shown in Table 1.

Example 3 The film shown in FIG. 4 was used on both sides of the printed circuit board shown in FIG. Lamination was performed using a laminator at a vacuum level of 40 torr, a lamination roll surface temperature of 100°C, a substrate feed rate of 1.3 m/min, and a roll pressure of 4 kg/cm.

Next, the substrate on which this multilayer film was bonded was subjected to a vacuum treatment at 5 torr in an autoclave while weighing 7 kg/
A curing treatment was performed at 150° C. for 2 hours at a pressure of cJ. Evaluation tests were conducted in the same manner as in Example 1 for the obtained laminate molded product. The results are shown in Table 1.

However, for evaluation items ■ and ■, after roughening treatment with a chromic acid mixture, adding a catalyst (palladium chloride) and activating treatment, printing a plating resist on areas other than the circuit pattern, and forming conductor circuits using electroless copper. It was added to a predetermined thickness using the 7-ki method to form a circuit pattern, and it was visually observed whether any defective parts had occurred in the circuit pattern.

Comparative Example 1 A multilayer film (containing a plating catalyst, AD layer is hardened) shown in Fig. 1 was laminated on both sides of a double-sided printed circuit board containing a plating catalyst (manufactured by Hitachi Chemical Co., Ltd.) shown in Fig. 6 (A). A laminate shown in FIG. 5 was produced. This lamination was carried out using a normal roll laminator at a lamination roll surface temperature of 100° C., a substrate feed rate of 1.3 m/min, and a roll pressure of 4 kg/cm.

Next, the same curing treatment as in Example 2 was performed, and the same evaluation test as in Example 1 was conducted. The results are shown in Table 1.

(Margins below this page) [Effects of the Invention] As explained above, according to the present invention, the multilayer film is laminated to the circuit board under reduced pressure, and the resulting laminate is then heated and cured under normal pressure. , the following effects can be achieved.

(Compared to the conventional method shown in Fig. 6(A) to Fig. 6(C), the additive method wiring board The manufacturing process can be simplified.

(2) Since the layers are laminated under reduced pressure, it is possible to obtain a laminate molded product (additive method wiring board) without voids between each layer.

[Brief explanation of the drawing]

Figures 1 to 4 are explanatory cross-sectional views of examples of multilayer films used in the present invention, and Figure 5 is a partially cutaway cross-section of a laminate obtained by laminating the multilayer film onto a circuit board under reduced pressure. Explanatory diagrams, FIGS. 6(A) to 6(C) are explanatory diagrams showing a conventional manufacturing process of a multilayer circuit board by an additive method. DESCRIPTION OF SYMBOLS 1... Insulating substrate, 2... Copper pattern, 3... Printed circuit board, 4... Insulating layer, 5... Additive layer, 6... Adhesive layer, 7... Barrier layer , 8...
Portion of the insulating layer in contact with the additive layer, 10... Release film. Figure 1 Figure 6'' Schiff Figure Figure (A) Figure (B) Figure (C)

Claims (2)

[Claims] 1. An additive method wiring board characterized in that a multilayer film consisting of an additive layer and an insulating layer mainly composed of epoxy resin and synthetic rubber is laminated on a substrate under reduced pressure, and then the resulting laminate is cured by heating. Production method. 2. 2. The method for producing an additive wiring board according to claim 1, wherein the heat curing is performed under normal pressure.