JPH0226016A - Lithography of circuit pattern - Google Patents
Lithography of circuit patternInfo
- Publication number
- JPH0226016A JPH0226016A JP17502988A JP17502988A JPH0226016A JP H0226016 A JPH0226016 A JP H0226016A JP 17502988 A JP17502988 A JP 17502988A JP 17502988 A JP17502988 A JP 17502988A JP H0226016 A JPH0226016 A JP H0226016A
- Authority
- JP
- Japan
- Prior art keywords
- film
- metal thin
- electron beam
- thin film
- photoresist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001459 lithography Methods 0.000 title 1
- 239000010408 film Substances 0.000 claims abstract description 63
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 36
- 229910052751 metal Inorganic materials 0.000 claims abstract description 29
- 239000002184 metal Substances 0.000 claims abstract description 29
- 238000010894 electron beam technology Methods 0.000 claims abstract description 25
- 239000010409 thin film Substances 0.000 claims abstract description 25
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 238000000034 method Methods 0.000 claims abstract description 14
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 3
- 230000001678 irradiating effect Effects 0.000 claims description 3
- 239000007788 liquid Substances 0.000 claims description 2
- 239000012780 transparent material Substances 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 5
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 abstract description 4
- 238000004544 sputter deposition Methods 0.000 abstract description 4
- 239000002952 polymeric resin Substances 0.000 abstract description 2
- 229920003002 synthetic resin Polymers 0.000 abstract description 2
- 230000008020 evaporation Effects 0.000 abstract 1
- 238000001704 evaporation Methods 0.000 abstract 1
- 239000011651 chromium Substances 0.000 description 6
- 238000007740 vapor deposition Methods 0.000 description 4
- 229910052804 chromium Inorganic materials 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000000609 electron-beam lithography Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 230000004308 accommodation Effects 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000012776 electronic material Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-M hydroxide Chemical compound [OH-] XLYOFNOQVPJJNP-UHFFFAOYSA-M 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、電子線描画によるマスク製造に適用して有効
な技術に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a technique that is effective when applied to mask manufacturing by electron beam lithography.
この種の技術について記載されている例としては、株式
会社工業調査会昭和６１年１１月１８日発行、「電子材
料別冊、超ＬＳＩ製造・試験装置ガイドブックＪＰｉｌ
Ｏ〜１１４がある。An example of this type of technology described is "Electronic Materials Special Volume, VLSI Manufacturing and Testing Equipment Guidebook JPil," published by Kogyo Kenkyukai Co., Ltd. on November 18, 1986.
There are 0 to 114.
前記文献にも記載されているように、半導体ウェハに所
定の回路パターンを転写する際には、石英ガラス等で構
成されたマスク基板上にクロム（Ｃｒ）の蒸着により遮
光パターンを形成したマスクあるいはレチクル（以下単
に「マスク」と総称する）を用いることが知られている
。As described in the above-mentioned literature, when transferring a predetermined circuit pattern onto a semiconductor wafer, a mask or mask is used in which a light-shielding pattern is formed by vapor deposition of chromium (Cr) on a mask substrate made of quartz glass or the like. It is known to use a reticle (hereinafter simply referred to as a "mask").
前記マスクは、第５図に示されるように、マスク基板１
５を構成する石英ガラスの主面全体にわたってクロム（
Ｃｒ）等の蒸着あるいはスパッタリングによって遮光膜
３（基礎膜）を被着し、その上面にポリマー等からなる
フォトレジスト材を均一膜厚で塗布する。続いて、該フ
ォトレジスト膜４上に対して電子線を所定形状に沿って
照射し、該照射部分のフォトレジスト膜の化学的特性を
変化させることによって該照射部分あるいは非照射部分
のフォトレジスト膜を除去し、下層の遮光膜を所定形状
に露出させる。次に、この部分露出遮光膜部分をエツチ
ング除去することによりマスク基板１５上に所定形状の
遮光パターンが得られるものである。The mask has a mask substrate 1 as shown in FIG.
Chromium (
A light shielding film 3 (base film) is deposited by vapor deposition or sputtering of Cr) or the like, and a photoresist material made of polymer or the like is applied to the upper surface of the light shielding film 3 to a uniform thickness. Next, the photoresist film 4 is irradiated with an electron beam along a predetermined shape, and the chemical properties of the photoresist film in the irradiated part are changed, thereby changing the photoresist film in the irradiated part or the non-irradiated part. is removed to expose the underlying light-shielding film in a predetermined shape. Next, by etching away this partially exposed light shielding film portion, a light shielding pattern of a predetermined shape is obtained on the mask substrate 15.
ところで電子線照射においては、前記フォトレジスト膜
４上に電子の帯電状態を生じ、そのクーロン効果によっ
て後続の描画における電子線が影響を受け、正確な電子
線の照射制御が困難となる場合がある。特に、誘電率の
高いフォトレジスト膜上に異物が付着されている場合に
は、この部分に電荷の集中が生じ、電子線照射によるパ
ターン描画が不良となる確率の極めて高いことが知られ
ている。By the way, in electron beam irradiation, a charged state of electrons is generated on the photoresist film 4, and the electron beam in subsequent drawing is affected by the Coulomb effect, making it difficult to accurately control the electron beam irradiation. . In particular, when foreign matter is attached to a photoresist film with a high dielectric constant, it is known that charge is concentrated in this area, and there is an extremely high probability that pattern drawing by electron beam irradiation will be defective. .
上記のような帯電状態を防止するために、第４図に示す
ように、マスク１１を収容固定するカセット１２におい
て、ばね１３等の付勢手段によって一面側に付勢された
状態のマスク１１に対してアースピン１４を該マスク面
のほぼ垂直上方より突き刺すようにし、マスク基板１５
上のフォトレジスト膜４および遮光膜３に対してアース
ピン１４を接触させ、カセット１２を通じて電子をマス
ク１１の外部に放出する技術が一般に行われている。In order to prevent the above-mentioned charging state, as shown in FIG. On the other hand, the ground pin 14 is pierced from almost perpendicularly above the mask surface, and the mask substrate 15 is
A commonly used technique is to bring an earth pin 14 into contact with the upper photoresist film 4 and light shielding film 3, and to emit electrons to the outside of the mask 11 through the cassette 12.
ところが、前記技術においては、アースピン１４による
点接触により電子の放出を行うため、アースピン１４と
フォトレジスト膜４あるいは遮光膜３との接触が確実に
行われているか否かが微妙な場合があり、複数本（例え
ば４本）のアースピン１４のうち１本でも非接触状態、
すなわちアースが不完全な状態となっていると、該非接
触状態の７オトレジスト膜領域あるいは遮光膜領域に電
子の帯電現象を生じ、該範囲における電子線の照射制御
が困難となる場合のあることが本発明者によって明らか
にされた。However, in the above technique, since electrons are emitted by point contact by the earth pin 14, there are cases where it is delicate whether the earth pin 14 is in reliable contact with the photoresist film 4 or the light shielding film 3. Even one of the plurality of (for example, four) earth pins 14 is in a non-contact state,
In other words, if the grounding is incomplete, electron charging may occur in the non-contact 7 photoresist film region or light shielding film region, making it difficult to control electron beam irradiation in that region. revealed by the present inventor.
本発明は、前記課題に着目してなされたものであり、そ
の目的は、フォトレジスト膜あるいは遮光膜に右ける帯
電現象を生じることなく、信頼性の高い電子線描画を実
現できる技術を提供することにある。The present invention has been made with attention to the above-mentioned problems, and its purpose is to provide a technology that can realize highly reliable electron beam lithography without causing the charging phenomenon that affects the photoresist film or the light-shielding film. There is a particular thing.
本発明の前記ならびにその他の目的と新規な特徴は、本
明細書の記述台よび添付図面から明らかになるであろう
。The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.
本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、概ね次の通りである。A brief overview of typical inventions disclosed in this application is as follows.
すなわち、基板上に所定の回路パターンを形成する際に
、基板上の基礎膜上に７オトレジスト膜を形成した後、
該フォトレジスト膜上に金属薄膜を被着し、該金属薄膜
を透過させてその下層のフォトレジスト層への電子線照
射を行うものである。That is, when forming a predetermined circuit pattern on a substrate, after forming a 7 photoresist film on the base film on the substrate,
A metal thin film is deposited on the photoresist film, and the electron beam is transmitted through the metal thin film to irradiate the underlying photoresist layer.
前記した手段によれば、基板上の金属薄膜を通じてフォ
トレジスト膜に対して電子線照射を行うことにより、照
射の際の電子は金属薄膜を通じて外部に放出されるため
、フォトレジスト膜あるいは下層の遮光膜等の基礎膜へ
の帯電を確実に防止でき、正確な電子線の照射制御を実
現できる。According to the above-mentioned means, by irradiating the photoresist film with an electron beam through the metal thin film on the substrate, the electrons during the irradiation are emitted to the outside through the metal thin film. It is possible to reliably prevent charging of base films such as membranes, and realize accurate electron beam irradiation control.
第１図（ａ）〜（社）は本発明の実施例である回路パタ
ーンの描画手順を示す説明図、第２図は本発明による一
実施例に用いられるカセットを示す斜視図、第３図は本
実施例のレチクルの断面構造を示す断面図である。FIGS. 1(a) to 1(a) are explanatory diagrams showing a circuit pattern drawing procedure according to an embodiment of the present invention, FIG. 2 is a perspective view showing a cassette used in an embodiment of the present invention, and FIG. FIG. 2 is a cross-sectional view showing the cross-sectional structure of the reticle of this example.
本実施例にふける基板はレチクル基板１であり、本実施
例を通じて得られるレチクル２は、例えば５：１の比率
によって図示されないウェハ上に所定の回路パターンを
縮小投影露光するためのものである。当該レチクル基板
１は所定厚の板状石英ガラスを四角形状に切断・研磨し
て得られるものである。The substrate used in this embodiment is a reticle substrate 1, and the reticle 2 obtained through this embodiment is for performing reduction projection exposure of a predetermined circuit pattern on a wafer (not shown) at a ratio of, for example, 5:1. The reticle substrate 1 is obtained by cutting and polishing a plate-shaped quartz glass of a predetermined thickness into square shapes.
前記レチクル基板１に対して、その−生面全体にまずク
ロム（Ｃｒ）等の遮光効果の高い金属を蒸着あるいはス
パッタリング等の方法で被着し、遮光膜３（基礎膜）を
形成する。First, a highly light-shielding metal such as chromium (Cr) is deposited on the entire raw surface of the reticle substrate 1 by vapor deposition or sputtering to form a light-shielding film 3 (base film).
続いて、前記遮光膜３上にポリマー樹脂からなるフォト
レジスト膜４を積層する。このようなフォトレジスト膜
４の積層は、例えば高速回転状態のレチクル基板１ （
遮光膜面）に対して液状のフォトレジスト液を所定滴数
だけ滴下し、これを高速回転の遠心力により遮光膜面の
全面に広げる、いわゆる回転塗布法により行われる。Subsequently, a photoresist film 4 made of polymer resin is laminated on the light shielding film 3. Such a stack of photoresist films 4 can be formed, for example, on the reticle substrate 1 (
This is done by a so-called spin coating method in which a predetermined number of drops of a liquid photoresist solution are dropped onto the light-shielding film surface and spread over the entire surface of the light-shielding film using centrifugal force of high speed rotation.
次に、前記フォトレジスト膜４の上層にアルミニウム（
Ａ１）からなる金属薄膜５を被着する。Next, aluminum (
A thin metal film 5 consisting of A1) is deposited.
該金属薄膜５の被着は蒸着あるいはスパッタリングによ
り可能であり、該金属薄膜５の膜厚は２０〜５００オン
グストロ一ム程度となるように制御されている。但し、
該金属薄膜５が十分に導電性を有しており、かつ電子線
６の透過効率の高いものであれば前記膜厚の範囲に限定
されない。以上のようにして第３図に示される断面構造
となる。The metal thin film 5 can be deposited by vapor deposition or sputtering, and the thickness of the metal thin film 5 is controlled to be approximately 20 to 500 angstroms. however,
The film thickness is not limited to the above range as long as the metal thin film 5 has sufficient conductivity and has a high transmission efficiency for the electron beam 6. As described above, the cross-sectional structure shown in FIG. 3 is obtained.
このようにして得られたレチクル２は第２図に示される
カセット７内に収容固定される。該収容手順は、まずカ
セット７内のばね８等の付勢手段を付勢方向に抗して保
持し、この状態で金属薄膜５の面が上面、すなわち露出
面となるようにしてレチクル２を側方よりスライドさせ
ながら同図の矢印方向に挿入する。ここで、本実施例で
用いられるカセット７は少なくとも、前記金属薄膜５と
接触される部分が導電性金属で構成されており、該カセ
ット部分はアースされている。The reticle 2 thus obtained is housed and fixed in a cassette 7 shown in FIG. In this accommodation procedure, first, the biasing means such as the spring 8 in the cassette 7 is held against the biasing direction, and in this state, the reticle 2 is placed so that the surface of the metal thin film 5 is the upper surface, that is, the exposed surface. Insert it in the direction of the arrow in the same figure while sliding it from the side. Here, at least the portion of the cassette 7 used in this embodiment that comes into contact with the metal thin film 5 is made of a conductive metal, and this cassette portion is grounded.
このようにレチクル２はカセット７に収容された状態で
、第１図（ａ）に示されるように電子線６がＸＹ力方向
走査制御されてレチクル面（金属薄膜面）上を照射する
。With the reticle 2 housed in the cassette 7 in this manner, the electron beam 6 is scan-controlled in the XY force directions and irradiates the reticle surface (metal thin film surface) as shown in FIG. 1(a).
ここで、第１図■に示されるように、電子線６は金属薄
膜５を透過してその下層のフォトレジスト膜４に達する
。ここで、フォトレジスト膜４において電子線６の照射
された範囲４ａは化学的特性が変化し、いわゆる潜像が
形成された状態となる。Here, as shown in FIG. 1, the electron beam 6 passes through the metal thin film 5 and reaches the underlying photoresist film 4. Here, the chemical characteristics of the area 4a of the photoresist film 4 irradiated with the electron beam 6 change, and a so-called latent image is formed.
この状態で、前記レチクル２をカセット７より取り出し
てアルカリ性の水溶液、あるいはＴＭＡＲ＜ｆトラメチ
ルアンモニウムハイドロオキサイド）等の有機系の現像
液によって潜像形成部分（電子線照射範囲４ａ）の金属
薄膜５およびフォトレジスト膜４を除去する。これによ
って第１図（Ｃ）に示されるように、レチクル基板１上
にフォトレジスト膜４による所定パターンが形成される
。In this state, the reticle 2 is taken out from the cassette 7 and the metal thin film 5 in the latent image forming area (electron beam irradiation range 4a) is treated with an alkaline aqueous solution or an organic developer such as TMAR<f tramethylammonium hydroxide). Then, the photoresist film 4 is removed. As a result, a predetermined pattern of the photoresist film 4 is formed on the reticle substrate 1, as shown in FIG. 1(C).
このように、本実施例−では金属薄膜５とフォトレジス
ト膜４との同一工程における同時除去が可能であるため
、パターン形成に際して処理工程が増加することはない
。In this way, in this embodiment, the metal thin film 5 and the photoresist film 4 can be removed simultaneously in the same process, so that the number of processing steps is not increased during pattern formation.
次に、上記により残着状態となっているフォトレジスト
膜４をマスクとして遮光膜３のエツチング処理を行う。Next, the light-shielding film 3 is etched using the photoresist film 4 remaining as a mask as described above.
このようなエツチング処理は公知技術のため詳細な説明
を省略するが、当該エツチング処理によって第１図（６
）に示されるような、遮光膜３による回路パターンが完
成される。Since such etching processing is a well-known technique, a detailed explanation will be omitted.
) A circuit pattern is completed using the light shielding film 3 as shown in FIG.
以上本発明者によってなされた発明を実施例に基づき具
体的に説明したが、本発明は前記実施例に限定されるも
のではなく、その要旨を逸脱しない範囲で種々変更可能
であることはいうまでもない。Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. Nor.
たとえば、以上の実施例では５；１の縮小投影露光を行
うレチクルを例に説明したが、■＝１の等倍露光を行う
いわゆるマスクであってもよい。For example, in the above embodiments, a reticle that performs 5:1 reduction projection exposure is used as an example, but a so-called mask that performs equal-magnification exposure of 5:1 may also be used.
また、以上の説明では主として本発明者によってなされ
た発明をその利用分野である、レチクルの形成に適用し
た場合について説明したが、これに限定されるものでは
なく、たとえば半導体ウェハ上における電子線によるパ
ターンの直接描画にも適用できる。Further, in the above explanation, the invention made by the present inventor is mainly applied to the field of application, which is the formation of a reticle, but the present invention is not limited to this. It can also be applied to direct drawing of patterns.
本願において開示される発明のうち代表的なものによっ
て得られる効果を簡単に説明すれば、下記の通りである
。A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.
すなわち、基板上の金属薄膜を通じてフォトレジスト膜
に対して電子線照射を行うことにより、照射の際の電子
は金属薄膜を通じて外部に放出されるため、フォトレジ
スト膜あるいは下層の基礎膜への帯電を確実に防止でき
、正確な電子線の照対制御を実現できる。In other words, by irradiating the photoresist film with an electron beam through the metal thin film on the substrate, the electrons during the irradiation are emitted to the outside through the metal thin film, thereby reducing the charge on the photoresist film or the underlying base film. This can be reliably prevented and accurate electron beam comparison control can be achieved.
第１図（ａ）〜（ｄ）は本発明の実施例である回路パタ
ーンの描画方法の手順を示す説明図、
第２図は本発明による一実施例に用いられるカセットを
示す斜視図、
第３図は実施例のレチクルの断面構造を示す断面図、
第４図は従来技術のカセット構造を示す断面図、第５図
は従来技術におけるマスクの断面構造を示す断面図であ
る。
１・・・レチクル基板、２・・・レチクル、３・・・遮
光膜、４・・・フォトレジスト膜、４ａ・・・電子線照
射範囲、５・・・金属薄膜、６・・・電子線、７・・・
カセット、８・・・ばね（付勢手段）、１１・・・マス
ク、１２・・・カセット、１３・・・ばね（付勢手段）
、１４・・・アースビン、１５・・・マスク基板。
第
図
第
図
／1(a) to 1(d) are explanatory views showing the steps of a circuit pattern drawing method according to an embodiment of the present invention; FIG. 2 is a perspective view showing a cassette used in an embodiment of the present invention; FIG. 3 is a cross-sectional view showing the cross-sectional structure of the reticle of the embodiment, FIG. 4 is a cross-sectional view showing the cassette structure of the prior art, and FIG. 5 is a cross-sectional view showing the cross-sectional structure of the mask in the prior art. DESCRIPTION OF SYMBOLS 1... Reticle substrate, 2... Reticle, 3... Light shielding film, 4... Photoresist film, 4a... Electron beam irradiation range, 5... Metal thin film, 6... Electron beam ,7...
Cassette, 8... Spring (biasing means), 11... Mask, 12... Cassette, 13... Spring (biasing means)
, 14... Earth bin, 15... Mask board. Fig. Fig./
Claims (1)
上の基礎膜上にフォトレジスト膜を形成した後、該フォ
トレジスト膜上に金属薄膜を被着し、該金属薄膜を透過
させてその下層のフォトレジスト層への電子線照射を行
うことを特徴とする回路パターンの描画方法。 ２、前記基板が透明体からなるマスク基板であり、該マ
スク基板上に形成された基礎膜が遮光膜であることを特
徴とする請求項１記載の回路パターンの描画方法。 ３、電子線照射後に、該電子線照射部分の金属薄膜とフ
ォトレジスト膜とを処理液によって同一工程で除去する
ことを特徴とする請求項１記載の回路パターンの描画方
法。 ４、上記金属薄膜が５０〜２００オングストロームの膜
厚で形成されたアルミニウム被膜であることを特徴とす
る請求項１記載の回路パターンの描画方法。[Claims] 1. When forming a predetermined circuit pattern on a substrate, a photoresist film is formed on the base film on the substrate, a metal thin film is deposited on the photoresist film, and the metal thin film is deposited on the photoresist film. A method for drawing a circuit pattern characterized by irradiating an electron beam through a metal thin film to a photoresist layer below. 2. The method for drawing a circuit pattern according to claim 1, wherein the substrate is a mask substrate made of a transparent material, and the base film formed on the mask substrate is a light-shielding film. 3. The method for drawing a circuit pattern according to claim 1, wherein after the electron beam irradiation, the metal thin film and the photoresist film in the electron beam irradiated portion are removed in the same step using a processing liquid. 4. The method for drawing a circuit pattern according to claim 1, wherein the metal thin film is an aluminum film formed with a thickness of 50 to 200 angstroms.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17502988A JPH0226016A (en) | 1988-07-15 | 1988-07-15 | Lithography of circuit pattern |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17502988A JPH0226016A (en) | 1988-07-15 | 1988-07-15 | Lithography of circuit pattern |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0226016A true JPH0226016A (en) | 1990-01-29 |
Family
ID=15988973
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17502988A Pending JPH0226016A (en) | 1988-07-15 | 1988-07-15 | Lithography of circuit pattern |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0226016A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06193065A (en) * | 1992-12-24 | 1994-07-12 | Giken Seisakusho Co Ltd | Press-in pile driving and drawing machine and press-in piling method for concrete pile, and clamping method therefor |
| JPH06200525A (en) * | 1992-12-28 | 1994-07-19 | Giken Seisakusho Co Ltd | Pile press-in method, and pile press-in and pull-out machine therefor |
| JPH06228960A (en) * | 1993-01-28 | 1994-08-16 | Giken Seisakusho Co Ltd | Pile jacking method and pile jacking and pulling-out machine |
| KR100402990B1 (en) * | 2001-10-26 | 2003-10-23 | 한국과학기술연구원 | The optical switching manufacture method using UV LIGA |
| JP2009268977A (en) * | 2008-05-08 | 2009-11-19 | Mitsubishi Rayon Co Ltd | Method of forming projecting and recessed parts on coating film surface having thin film metal layer |
-
1988
- 1988-07-15 JP JP17502988A patent/JPH0226016A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06193065A (en) * | 1992-12-24 | 1994-07-12 | Giken Seisakusho Co Ltd | Press-in pile driving and drawing machine and press-in piling method for concrete pile, and clamping method therefor |
| JPH06200525A (en) * | 1992-12-28 | 1994-07-19 | Giken Seisakusho Co Ltd | Pile press-in method, and pile press-in and pull-out machine therefor |
| JPH06228960A (en) * | 1993-01-28 | 1994-08-16 | Giken Seisakusho Co Ltd | Pile jacking method and pile jacking and pulling-out machine |
| KR100402990B1 (en) * | 2001-10-26 | 2003-10-23 | 한국과학기술연구원 | The optical switching manufacture method using UV LIGA |
| JP2009268977A (en) * | 2008-05-08 | 2009-11-19 | Mitsubishi Rayon Co Ltd | Method of forming projecting and recessed parts on coating film surface having thin film metal layer |
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