JPH02254748A - Semiconductor device - Google Patents

Abstract

PURPOSE:To make it possible to form a stable capacitor, which is not affected by an electric field from a base element, by a method wherein a conductor layer grounded through an insulating film is formed under the capacitor using a ferroelectric film. CONSTITUTION:An insulating film 3, a first electrode 11, a ferroelectric thin film 12 and a second electrode 13 are formed on a semiconductor substrate 1, the film 3, the electrode 11 and the film 12, respectively: and the electrode 11, the film 12 and the electrode 13 are formed in the structure of a capacitor. Moreover, a conductor layer 8 having at least one grounded layer is formed in an insulating film 9 under the capacitor. In such a way, as the layer 8 grounded through the film 9 is formed under the capacitor, the capacitor is not affected by an electric field from a gate electrode, for example, under the layer 8 and the like and a stable capacitor characteristic is obtained without depending on the electric field from the gate electrode.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a nonvolatile memory using ferroelectric material,
In particular, it relates to techniques that are effective when applied to capacitors.

[Prior Art] As a semiconductor non-volatile memory, an MIS type transistor uses a phenomenon in which the surface voltage of a silicon substrate is modulated by injecting charge from a silicon substrate into a trap or a floating gate in an insulated gate. , -e, and has been put into practical use as EPROM (ultraviolet erasable nonvolatile memory) and EEFROM (electrically rewritable nonvolatile memory). However, these nonvolatile memories have drawbacks such as a high voltage for rewriting information, usually around 20V. For nonvolatile memories that use ferroelectric materials whose polarization can be electrically reversed, the write voltage is the commonly used 5μ, and the polarization is maintained even when the power is turned off, so it is not ideal. It has the potential to become a non-volatile memory.

[Problem to be solved by the invention] One of the structures of a nonvolatile memory using such a ferroelectric material is to stack a capacitor on top of a transistor with an insulating film interposed therebetween, as typified by FIG. There is a so-called stacked structure. Since this structure is a laminated structure, (1) the area per cell is small, and extremely miniaturization and high integration are possible.

However, in this structure, the gate electrode of the underlying transistor, the insulating film thereon, and the lower electrode of the capacitor form a parasitic capacitor structure. Therefore, the original capacitor and the parasitic capacitor are capacitively coupled in series.

However, as mentioned above, ferroelectric materials are polarized at low voltages (for example, about 2 cm when the ferroelectric film thickness is 5,000 layers), so they are polarized by the electric field of the gate electrode of the underlying transistor. occurs, resulting in polarization inconsistency and reversal, resulting in malfunction. Further, as miniaturization progresses in the future and the insulating film between the capacitor and the I/transistor becomes thinner, the above-mentioned effect will become thicker, making it difficult to miniaturize.

The present invention is intended to solve these problems, and its purpose is to provide a stable capacitor that is not affected by the electric field of elements such as transistors in the underlying layer.

[Means to solve the problem] The semiconductor device of the present invention is:

(1) An insulating film is formed on the semiconductor substrate, and the 11th! A pole is formed, and the 11th it
! 1! A ferroelectric thin film is formed on top, a second electrode is formed on the ferroelectric thin film, and the first electrode, the ferroelectric thin film, and the second electrode form a capacitor structure. At least one
A grounded conductor layer is formed in the insulating film below the capacitor.

(2) The main component of the ferroelectric thin film is at least Pb.
T i Oa, P Z T (P
I) T i Os / P b Z
ro 3), P L Z T C L a / P
b T i Os / P b Zr○,).

(3) The conductor layer is characterized by being made of a polycide film.

[Embodiment] FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention. Further, FIGS. 2(a) to 2(b)+3 are main sectional views for each manufacturing process.

In all sections of the embodiment, parts having the same functions are given the same reference numerals, and repeated explanations thereof will be omitted.

The explanation will be made below with reference to FIGS. 2(a) to 2(c). Here, for convenience of explanation, an example using an N-channel transistor will be explained.

First, as shown in FIG. 2(a), for example, a P-type Si substrate 1 is used. Appropriate resistivity is about 20 ohm-cm, and about 6,000 insulators for element isolation are formed using the LOCOS method, for example.

Reference numeral 7 denotes a gate film, which is formed by thermal oxidation in an oxidizing atmosphere after the element isolation insulating film 2 is formed. For example, about 300 layers may be appropriate. 4 is a gate electrode, for example λ, is made of poly-Si, and is formed to have a film thickness of 4000 layers, for example. 5
and 6 are N-type diffusion layers that become the source and drain of the MO3I-randisk. For example, after forming the gate electrode 4, 4×10"c of phosphorus is added by ion implantation.
It is formed by implanting m"". Reference numeral 3 denotes a first interlayer insulating film for separating it from the MO5 type transistor formed on the Si substrate 1, and a film of, for example, 2000 5iO= is formed by chemical vapor deposition (CVD).

Next, as shown in FIG. 2(b), on the first interlayer insulating film 3,
A conductor 118 is formed below where a capacitor will be formed later.For example, a poly-Si film ion-implanted with impurities such as phosphorus at a high concentration of 5 x 10 cm or more may be used, but For output circuits, etc.), polycide material is best because it has a low resistance value because it can also be used as a wiring layer.The conductor layer 8 is wired so as to be connected to the grounding wire of the power supply.After that, A second interlayer insulator 1!19 for separating the conductor layer 8 from a capacitor to be formed later is formed by 2,000 people by chemical vapor deposition.

Next, as shown in FIG. 2(C), a connection hole (hereinafter referred to as a contact hole) 10 for connecting the source 5 and the 11 poles of the capacitor is formed by a photo-etching process. As the electrode 11, for example, AL
For example, ILLm is formed using a sputtering method. Then, a predetermined pattern is formed by a photo-etching process.

Note that the material of the lower electrode 11 affects the crystallinity of the ferroelectric film to be formed subsequently, so for example, PT may be used. Also, formation of a predetermined pattern can be performed by forming one ferroelectric film. It may be performed after the formation of the upper electrode or all at once after the formation of the upper electrode.

Next, the ferroelectric film 12 is made of, for example, PbTi◯.

For example, 5,000 layers are formed using a sputtering method. Then, for example, the ferroelectric film 12 is heat-treated for 1 hour at 550° C. in a N2 atmosphere, and is formed into a predetermined pattern by a photo-etching process as the upper electrode 13. For example, 5,000 ALs are formed by the spacing method, and then formed into a predetermined pattern by a photo-etching process.

Finally, a layer 111114 of SiN, for example, is formed by plasma chemical vapor deposition to obtain an embodiment of the present invention as shown in FIG.

In this example, 5PbT is used as the ferroelectric film 12.
iOa was used, but PZT (PbTiOs/P
bZr0a), PLZT, etc. may also be used.

In this way, by forming a conductor layer that is grounded through an insulating film under the capacitor, it becomes unaffected by the electric field from the gate electrode, etc. underneath (electrostatic shielding effect), and therefore, Stable capacitor characteristics can be obtained regardless of the electric field from the gate electrode, thereby improving the stability of the IC chip.゛Again. As the insulating film between the capacitor and the transistor becomes thinner, it becomes more susceptible to the electric field of the transistor below. However, in the present invention, the film is thinned to the extent that the transistor and the conductor layer, and the conductor layer and the lower electrode are not short-circuited. Since this is possible, miniaturization in the height direction is possible.

Further, in this embodiment, the conductor layer is formed entirely below the capacitor, but it is not necessary to exist entirely below the capacitor, as it only needs to be present on the portion of the underlying element that generates an electric field.

Furthermore, since this example is about improving the characteristics of a capacitor using a ferroelectric material, the underlying structure is not limited to the structure explained in this example, but also a CMO8 structure and a structure using bipolar transistors. Needless to say, it's a good thing.

[Effect of the Invention 1] As described above, according to the semiconductor device of the present invention, by forming a conductor layer grounded through an insulating film under a capacitor using a ferroelectric film, the underlying It is possible to create a stable capacitor that is not affected by the electric field of the device.

[Brief explanation of drawings]

FIG. 1 is a main sectional view showing an embodiment of a semiconductor device of the present invention. FIGS. 2(a) to 2(c) are main cross-sectional views for explaining one step of the method for manufacturing a semiconductor device according to the present invention in the order of steps. FIG. 3 is a main sectional view showing a conventional semiconductor device. l ・ ・ 2 ・ ・ 3 ・ ・ 4 ・ ・ 5 ・ ・ 6 ・ ・ 7 ・ ・ 8 ・ ・ Si substrate Insulating film for element isolation First interlayer insulating film Gate electrode Source Drain Gate Pus conductor layer Second interlayer insulating film Contact Hall lower 1f pole, ferroelectric film, upper electrode, protective film Applicant: Seiko Epson Corporation

Claims (3)

[Claims] (1) An insulating film is formed on a semiconductor substrate, a first electrode is formed on the insulating film, a ferroelectric thin film is formed on the first electrode, and the ferroelectric thin film is formed on the first electrode. A second electrode is formed on the thin film, and the first electrode, the ferroelectric thin film, and the second electrode have a capacitor structure. A semiconductor device, characterized in that the semiconductor device is formed in the insulating film below the capacitor. (2) The main component of the ferroelectric thin film is at least PbTi.
O_3, PZT (PbTiO_3/PbZrO_3),
2. The semiconductor device according to claim 1, wherein the semiconductor device is one of PLZTCLa/PbTiO_3/PbZrO_3. (3) The semiconductor device according to claim 1, wherein the conductor layer is made of a polycide film.