JPH0225072A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent impurity ions from penetrating into a channel region by a method wherein a polycrystalline silicon film section and a non-crystal silicon film section are alternately multi-laminated to form a gate electrode on an oxide film section, which is used as a mask to form a source region and a drain region by performing the injection of impurity. CONSTITUTION:A gate insulating film 3 is formed on a silicon substrate 1, and moreover non-crystal silicon film sections 4b1 and 4b2 and polycrystalline silicon film 4a1 and 4a2 are alternately laminated, which is selectively removed to leave only a part corresponding to a gate section to form a laminated gate electrode 4 between inter-element isolating oxide films 2a and 2b. The penetration of ions 7 into a channel region 6 is shut off at the time when a source region 5a and a drain region 5b are formed through the implantation of impurity ions 7 using the electrode 4 as a mask. Thereafter, the film sections 4b1 and 4b2 are made to be polycrystallized through a heat treatment for the formation of an excellent semiconductor element.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to an improvement in a method for manufacturing a semiconductor device having a MOS (MOS) transistor.

[Conventional technology]

FIG. 3 shows the overall general structure of a conventional MOS transistor of this type, and FIG. 4 shows the detailed structure of its gate electrode.

That is, in the conventional structure shown in FIGS. 3 and 4, reference numeral 1 denotes a silicon semiconductor substrate, and 2a and 2b denote portions S formed in the element isolation regions on the main surface of the silicon semiconductor substrate l. oxide films, 3 and 4 are gate insulating films and gate electrodes which are successively laminated in selected parts of the element forming region; 5a and 5b are diffusion regions and gate electrodes which are formed by diffusion with the gate insulating film 3 in between; A drain region, 6 a channel region formed on the lower surface of the gate insulating IPJ3 between the source region 5a and the drain region 5b, and 7 an asbestos material implanted to form the source region 5a and the drain region 5b. It is an ion.

To manufacture this conventional device, first, a sufficiently thick oxide film 2 is formed on the main surface of a silicon semiconductor substrate 1 for isolation between elements.
A and 2b are divided, and an insulating oxide film is formed by thermal oxidation and a polycrystalline silicon film is sequentially formed by low-pressure vapor deposition on the entire surface of the element forming region. The gate insulating film 3 and the gate electrode 4 are formed by selectively removing the gate insulating film 3 and the gate electrode 4 by leaving only the portion corresponding to the gate. Next, using this gate electrode 4 as a mask, impurity ions 7 are implanted and diffused to form a source region 5a with the gate insulating film 3 in between.
By forming the source region 5a and the drain region 5b, a channel region 6 is formed on the lower surface of the gate insulating film 3 between the source region 5a and the drain region 5b, and in this way, the desired MOS transistor is obtained. .

[Problem to be solved by the invention]

The conventional MOS l-transistor is constructed as described above, but the polycrystalline silicon film forming the gate electrode 4 is grown during deposition, and its crystal grains are formed as shown in FIG. Since the impurity ions 7 are grown in a columnar shape during the diffusion formation of the source region 5a and drain region 5b, the impurity ions 7 that are implanted may directly penetrate the crystal grain boundaries or cause polycrystalline silicon to grow along the crystal axis. Because the ions pass through the constituent silicon atoms without colliding with them (hereinafter referred to as channeling), the gate electrode 4 made of this polycrystalline silicon film does not completely fulfill its role as an ion implantation mask. There are cases. In other words, it is not possible to completely block impurity ions 6 from entering the channel region 7, which causes a problem in that the electrical characteristics of the MOS transistor to be constructed tend to change.

This invention has been made to solve these conventional problems, and its purpose is to prevent impurity ions from entering the channel region when forming the source and drain regions by implanting impurity ions. We made it possible to obtain an ion implantation mask, in this case a gate electrode, that can completely block invasion. It is an object of the present invention to provide a method for manufacturing this type of semiconductor device, in this case, a method for manufacturing an lll09l-transistor.

[Means to solve the problem]

In order to achieve the above object, a method for manufacturing a semiconductor device according to the present invention includes forming a gate electrode in a MOS transistor into a multilayer structure consisting of a polycrystalline silicon film and an amorphous silicon film; Using the gate electrode according to the structure as an ion implantation mask, a source region and a drain region are formed by implanting impurity ions, and then heat treatment is performed to polycrystallize the amorphous silicon film.

That is, the present invention includes a step of forming an oxide film portion that will become a gate insulating film on an element formation region of a semiconductor substrate, and forming a polycrystalline silicon film portion that will become a gate electrode and an amorphous silicon film portion on this oxide film portion. A process of sequentially and alternately stacking film portions in multiple layers, and selectively removing the oxide film portion, the alternatingly layered polycrystalline silicon film portions, and the amorphous silicon film portion, leaving only the portion corresponding to the gate portion. forming a gate insulating film using the oxide film portion, and forming a multilayered gate electrode in a laminated state using the alternately laminated polycrystalline silicon film portion and amorphous silicon film portion; a step of ion-implanting impurities using a mask to form a source region and a drain region; and a step of heat-treating the impurity to polycrystallize the amorphous silicon film portion and diffusing the ion-implanted portion. A method of manufacturing a semiconductor device is characterized in that it includes the following steps.

[For production]

Therefore, in the method of this invention, the gate electrode in the MOS transistor is first made into a multilayer structure consisting of a polycrystalline silicon film and an amorphous silicon film, and the gate electrode in this state is used as an ion implantation mask. Since impurity ions are implanted to form the source and drain regions, at this point, that is, at the time of implanting impurity ions to form the source and drain regions, impurity ions are not implanted into the channel region. The intrusion can be completely blocked, and the subsequent heat treatment polycrystallizes the amorphous silicon film and diffuses the ion-implanted impurities in the source and drain regions, resulting in a predetermined configuration. Therefore, an OS transistor can be obtained.

〔Example〕

Hereinafter, one embodiment of the method for manufacturing a semiconductor device according to the present invention will be described in detail with reference to FIGS. 1 and 82.

FIG. 1 is a sectional view schematically showing the overall configuration of a MOS transistor to which this embodiment is applied. FIG. 2 is an overhead view showing the detailed structure of the gate electrode. In the configurations of the embodiments shown in FIGS. 1 and 2, the third
The same reference numerals as those in the conventional structure shown in FIG. 4 and FIG. 4 indicate the same or corresponding parts.

That is, in the embodiment configurations shown in FIGS. 1 and 2 as well, reference numeral 1 denotes a silicon semiconductor substrate, and 2a and 2b denote isolation formed in the element isolation region on the main surface of this silicon semiconductor substrate l. Oxide films 3 and 4 are gate insulating films and gate electrodes that are sequentially laminated in selected parts of the element formation region, and this gate electrode 4
has a multilayer structure in which polycrystalline silicon film portions 4a, 4a2 and amorphous silicon film portions 4b, 4b2 are sequentially and alternately laminated. Further, 5a and 5b are source and drain regions formed by diffusion with the gate insulating film 3 in between, and 6 is a channel formed on the lower surface of the gate insulating film 3 between the source region 5a and the drain edge region 5b. Regions 7 are impurity ions implanted to form these source regions 5a and drain regions 5b.

Therefore, in manufacturing this embodiment device, first, the main surface of a silicon semiconductor substrate 1 is coated with a sufficiently thick oxide film 2 for isolation between elements.
After forming an insulating oxide film portion by a thermal oxidation method on the entire surface of the element forming region, which is divided by a and 2b, a low pressure vapor phase growth method is used to first form an Si
A polycrystalline silicon film portion 4at is deposited in an Ia atmosphere at a temperature at which polycrystalline silicon grows (for example, about 600 to 850°C), and then in the same atmosphere,
This time the temperature at which amorphous silicon is deposited (e.g. 45
0 to 500℃) to form the amorphous silicon film portion 4.
By depositing and forming b1 and further repeating this temperature rise and fall as appropriate, the next stage polycrystalline silicon film portion 4 a 2 is formed.
S i
Using a gas such as PH3 that contains impurities together with Ha, a silicon layer containing impurities and low resistance is formed, and then these insulating oxide film parts, the polycrystalline silicon film parts laminated alternately, and the amorphous silicon layer are formed. The silicon film 3 is selectively removed by photolithography and etching, leaving only the gate-corresponding parts. Depending on the polycrystalline silicon film portion and the amorphous silicon film portion laminated on the substrate, a gate electrode 4 having a multilayer structure is formed in a laminated state.

Next, impurity ions 7 are implanted using the gate electrode 4 having a multilayer structure in which polycrystalline silicon film portions and amorphous silicon film portions are alternately laminated as a mask to form a source region 5a and a drain region 5b. and a channel region 8 is formed on the lower surface of the gate insulator 1lI3 between the source region 5a and the drain region 5b. Amorphous silicon film portion 4
The presence of b1 and 4b2 reliably prevents the impurity ions implanted here from penetrating through the grain boundaries constituting the gate electrode 4 or from entering the channel region 8 due to channeling. You get it.

After the ion implantation, heat treatment is performed at a temperature of about 900°C, for example, to form the amorphous silicon film portion 4.
b 1.4 b 2 is polycrystallized, the impurity is diffused from the impurity-containing layer portion to the impurity-free layer portion in the gate electrode 4 to lower the resistance between each portion, and at the same time, the ion The injected area was also diffused, and in this way 5 desired results were obtained! 1iO3) transistor.

In the above embodiment, a case was described in which the polycrystalline silicon film portion and the amorphous silicon film portion constituting the gate electrode were alternately arranged in two layers, making up one total layer. The film portion and the amorphous silicon film portion may each have at least one layer, and
There is no particular restriction on the order in which the gate oxide film is stacked, and the same actions and effects as in the embodiments can be obtained in each case.

〔Effect of the invention〕

As detailed above, according to the method of the present invention, an oxide film portion is formed on an element formation region of a semiconductor substrate, and a polycrystalline silicon film portion and an amorphous silicon film portion are sequentially and alternately formed thereon. After forming 81 multilayers, these oxide film parts and the alternately laminated polycrystalline silicon film parts and amorphous silicon film parts were selectively removed leaving only the part corresponding to the gate part. A gate insulating film is formed using the oxide film, a multilayered gate electrode is formed using the alternately laminated polycrystalline silicon film and amorphous silicon film, and impurity ions are ionized using the gate electrode as a mask. Since the impurity ions are implanted to form the source and drain regions, it is not possible to completely block impurity ions from entering the channel region formed across the gate electrode at the time of impurity ion implantation. What you can do,
Unlike conventional methods, it is possible to completely and effectively prevent implanted impurity ions from penetrating through the crystal grain boundaries of the gate electrode and from entering the channel region due to channeling. Since the amorphous silicon film is made polycrystalline,
The gate electrode itself can also be formed in a normal state, and in this way, there is no risk of changing the electrical characteristics of the constructed MOS transistor, and moreover, the gate electrode can be formed in a multilayer structure. The polycrystalline silicon film portion and the amorphous silicon film portion can be formed simply by controlling the rise and fall of the reaction temperature, so they can be processed in the same reaction chamber, and for this reason, the manufacturing process itself can also be compared. It has excellent features such as being simple and easy to implement.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view schematically showing the general structure of the entire MOS transistor to which an embodiment of the method for manufacturing a semiconductor device according to the present invention is applied, and FIG. 2 is an overhead view showing the detailed structure of the gate electrode. , and FIG. 3 shows MO according to the conventional example.
S) A sectional view schematically showing the general structure of the entire transistor, and FIG. 4 is an overhead view showing the detailed structure of the gate electrode. 1...Silicon semiconductor substrate, 2a, 2b...GI oxide film for element amount, 3...Gate insulating film, 4...
・Gate electrode, 4a 4a... Polycrystalline silicon film part, 4b1゜1' 2 4b2... Amorphous silicon film part, 5a... Source region, 5b... Drain region, 8 ...Channel region, 7...Impurity ions. Figure 2 Figure 1

Claims (1)

[Claims] A step of forming an oxide film portion that will become a gate insulating film on an element formation region of a semiconductor substrate, and sequentially and alternately forming a polycrystalline silicon film portion and an amorphous silicon film portion that will become a gate electrode on this oxide film portion. The oxide film portion, the alternately laminated polycrystalline silicon film portion, and the amorphous silicon film portion are selectively removed leaving only the portion corresponding to the gate portion, and the oxide film is laminated in multiple layers. A step of forming a gate insulating film in some parts, and forming a multilayered gate electrode in a laminated state by alternately laminated polycrystalline silicon film parts and amorphous silicon film parts, and masking the gate electrode. a step of ion-implanting impurities to form a source region and a drain region, and heat-treating this to polycrystallize the amorphous silicon film portion,
A method of manufacturing a semiconductor device, comprising the step of diffusing the ion-implanted portion.